Compact Modeling – TechConnect Briefs

Consistency of compact MOSFET models with the Pao-Sah formulation: consequences for small-signal analysis

Galup-Montoro C., Schneider M.C., Cunha A.I.A., Federal University of Santa Catarina, BR

Compact models for the MOSFET are based on the decomposition of the two-dimensional problem into two one-dimensional problems. Since a compact MOSFET model core consists of an input voltage equation, and an output current equation, [...]

HiSIM2.4.0: Advanced MOSFET model for the 45nm Technology Node and Beyond

Miura-Mattausch M., Sadachika N., Miyake M., Navarro D., Ezaki T., Mattausch H.J., Miura-Mattausch M., Ohguro T., Iizuka T., Taguchi M., Miyamoto S., Inagaki R., Furui Y., Hiroshima University, JP

HiSIM realizes both accurate and fast circuit simulation. The newly developed HiSIM2.4.0 includes required features in modeling for the 45nm technology node and beyond such as the STI stress effect. A major development is an [...]

A History of Electronic Traps on Silicon Surfaces and Interfaces

Sah C-T, Jie B.B., Chen Z., University of Florida, US

A review of the electronic or electron and hole traps on silicon surfaces and interfaces is given. They are increasingly affecting the electrical signal properties of silicon diodes and transistors as the technologies for digital, [...]

High Conentration of Interface Traps in MOS Transistor Modeling

Chen Z., Jie B.B., Sah C-T, Xiamen University, CN

Modifications of the MOS capacitor and transistor characteristics by the presence of a high concentration of interface traps are described. Change or distortion of the gate/base voltage dependent characteristics are presented, such as the gate [...]

Analytical Solutions for Long-Wide-Channel Thick-Base MOS Transistors I. Effects of Remote Boundary Conditions and Body Contacts

Jie B.B., Sah C-T, Peking University, CN

Analytical solutions and computed characteristics for long-wide-channel thick-base MOS transistors are reported. The second generation industrial-consensus surface potential approach is used. Decomposition of the 2-Dimensional transistor problem into two 1-D problems follows the 1966-Pao-Sah current- [...]

Compact Modeling Framework for Short-Channel DG and GAA MOSFETs

Børli H., Kolberg S., Fjeldly T.A., Norwegian University of Science and Technology, NO

To achieve sufficient accuracy in the compact modeling of short-channel, nanoscale DG and GAA MOSFETs, the multi-dimensionality of the body potential and the electronic charge distribution has to be accurately described. In sub-threshold, the device [...]

Modeling of Saturation-Region Characteristics of Nanoscale Double-Gate MOSFETs

Fossum J.G., Chouksey S., University of Florida, US

Saturation-region effects, unique to double-gate (DG) MOSFETs, are discussed and modeled in UFDG. The effects include carrier velocity overshoot and drain-induced charge enhancement (DICE). The former, modeled in terms of carrier temperature, implies ballistic-like currents [...]

A Versatile Multigate MOSFET Compact Model: BSIM-MG

Hu C., Dunga M., Lin C.H., Lu D., Niknejad A., University of California-Berkeley, US

BSIM-MG is a surface-potential based compact model for multi-gate MOSFETs such as FinFETs fabricated on either SOI or bulk substrates. It can model transistors with the gate controlling two, three, or four sides of the [...]

3-D Analytical Models for the Short-Channel Effect Parameters in Undoped FinFET Devices

Hamid H.A., Roig J., Universitat Rovira i Virgili, ES

We present 3-D analytical models for subthreshold swing, threshold voltage and threshold volatge roll-off of undoped FinFET devices. After solving the 3-D Poisson equation, in which the mobile charge term was included, we have obtained [...]

A PSP based scalable compact FinFET model

Smit G.D.J., Scholten A.J., Serra N., Pijper R.M.T., van Langevelde R., Mercha A., Gildenblat G., Klaassen D.B.M., NXP Semiconductors, NL

A high-quality compact FinFET model is a prerequisite for initial circuit design and evaluation of these prospective replacements for conventional bulk MOSFETs. Our PSP-based compact model for symmetric 3-terminal FinFETs with thin undoped or lightly [...]

A Unified View of Drain Current Models for Undoped Double-Gate SOI MOSFETs

Ortiz-Conde A., García-Sánchez F.J., Simón Bolívar University, VE

In this paper we discuss the compact modeling framework for undoped double-gate SOI MOSFETs. Core compact models, including the analysis for surface potential and drain current for various device structures are discussed and compared. Then, [...]

Analytic Charge Model for Double-Gate and Surrounding-Gate MOSFETs

Yu B., Lu H., Lu W-Y, Lu H., Lu W-Y, Taur Y., UCSD, US

An analytic charge model for both double-gate (DG) and surrounding-gate (SG) MOSFETs is presented. With only the mobile charge term, Poisson’s equation is rigorous solved and the analytic electrostatic potential is derived. The development of [...]

Unified Compact Model for Generic Double-Gate MOSFETs

Zhou X., See G.H., Zhu G.J., Zhu Z.M., Chandrasekaran K., Zhu G.J., Zhu Z.M., Rustagi S.C., Lin S-H, Wei C.Q., Lim G.H., Nanyang Technological University, SG

A generic double-gate (DG) MOSFET follows a generalized (input) voltage equation from the first integral of Poisson equation and Gauss' law at the two gates, which is implicit and, in general, non-integrable when the channel [...]

Carbon Nanotube Transistor Compact Model

Deng J., Wan G.C., Wong H.-S., Stanford University, US

The principal challenges for the semiconductor industry at the nanoscale are: (1) power and performance optimization, (2) device fabrication and control of variations at the nanoscale, and (3) integration of a diverse set of materials [...]

Modeling of FET Flicker Noise and Impact of Technology Scaling

Chen C-Y, Liu Y., Cao S., Dutton R., Sato-Iwanaga J., Inoue A., Sorada H., Stanford University, US

Ongoing scaling of device dimensions, including the introduction of new channel materials and device structures, as well as the incorporation of novel gate-stack materials, has major implications on noise performance metrics. In particular, flicker noise [...]

Modeling MOSFET Process Variation using PSP

Watts J.S., Lee Y.M., Park J-E, IBM, US

The PSP model has been extensively evaluated for it’s abililty accurately match IV and CV characteristics MOSFETs measured on a single die. This enables accurate prediction of circuit behavior for circuits made of transistors which [...]

Modeling Process Variations Using a Compact Model

Murali R., Meindl J.D., Georgia Tech, US

Inclusion of manufacturing variations has become an important part of static timing analysis. Existing statistical timing analysis methods involve the use of time-consuming circuit simulations or use fit polynomials. Previous efforts at modeling parameter variations [...]

Simulating CMOS Circuits Containing Multiple FET Types Including the Geometric Dependence of Correlation between FET Types

Park J-E, Park S-J, Liang C-H, Assenmacher J., Watts J., Park J-E, Park S-J, Wachnik R., IBM, US

MOSFET device of similar design but different threshold voltage are often built on a single chip. It is important to be able to simulate with a compact model the variation of such devices including the [...]

Optimal Skew Corners for Compact Models

Lu N., IBM, US

We present an innovative approach to generate an optimal skew corner of a compact device model (e.g., a Spice model) for a single performance target, and to generate a common/optimal skew corner of a compact [...]

Impact of Gate Induced Drain Leakage and Impact Ionization Currents on Hysteresis Modeling of PD SOI Circuits

Chen Q., Suryagandh S., Goo J-S, An J.X., Thuruthiyil C., Icel A.B., Advanced Micro Devices, US

The impact of the gate induced drain leakage and impact ionization currents on hysteresis of PD FB SOI circuits is examined, and a physical understanding is provided. Measured silicon data from 90nm and 65nm PD [...]

Compact modeling of drain current in Independently Driven Double-Gate MOSFETs

Munteanu D., Autran J-L, Loussier X., Tintori O., L2MP-CNRS, FR

As CMOS scaling is approaching its limits, Double-Gate (DG) MOSFET is envisaged as a possible alternative to the conventional bulk MOSFET. In spite of excellent electrical performances due to its multiple conduction surfaces, conventional DG [...]

Explicit Short Channel Compact Model of Independent Double Gate Mosfet

Reyboz M., Rozeau O., Poiroux T., Martin P., Cavelier M., Jomaah J., CEA-LETI, FR

This paper describes an explicit short channel compact model of Independent Double Gate (IDG) MOSFET with undoped channel. The validity of this model is demonstrated by comparison with Atlas simulations. The model was implemented in [...]

A Computationally Efficient Method for Evaluating Distortion in DG MOSFETs

Salazar R., Ortiz-Conde A., García-Sánchez F.J., Solid State Electronics Laboratory, VE

In this paper we have generalized the correlation between Integral Nonlinearity Function (INLF) and Total Harmonic Distortion (THD) of independently driven double -gate (IDDG) MOSFETs.

High Voltage MOSFET’s Modeling Review

Ma Y., Jeng M-C, Liu Z., Cadence Design System, Inc., US

In this paper, different modeling solutions for HVMOS and LDMOS are discussed, current status of compact model development for HVMOS/LDMOS are reviewed. Macro models are widely used to model HVMOS and LDMOS devices. Different macro [...]

Modeling the Geometry-Dependent Parasitics in Multi-Fin FinFETs

Chan M., Wu W., HKUST, HK

The geometry-dependent parasitic components in multi-fin FinFETs are studied. The gate-resistance has a stronger dependent on the device geometry compared with the planar MOSFETs. Parasitic fringing capacitance and overlap capacitance become highly coupled to the [...]

Analysis of Halo Implanted MOSFETs

McAndrew C.C., Drennan P.G., Freescale Semiconductor, US

MOSFETs with heavily doped regions at one or both ends of the channel exhibit some quantitative differences in electrical behavior compared to devices with laterally unform channel doping. These can include a peakiness to the [...]

Modeling the electrical characteristics of FET-type sensors for biomedical applications

Deen M.J., Shinwari M.W., McMaster University, CA

Uniquely examining and identifying biological pathogens is of great importance in health care, as it facilitates early detection, isolation and possibly prevention of many diseases. Availability of highly efficient and easily produced sensors could have [...]

Non-standard geometry scaling effects

Lehmann S., Technische Universität Dresden, DE

The impact of process and geometry effects on important electrical parameters of SiGe HBTs as a function of emitter width is investigated and explained using device and circuit simulations. The goal is to provide a [...]

Theory of source-drain partitioning in MOSFET

Roy A.S., Enz C.C., Sallese J.M., EPFL, CH

The Ward-Dutton (WD) partitioning scheme is used extensively to develop transient and high frequency advanced compact models for MOSFET devices. Recently it has been shown that WD partitioning fails for field dependent mobility or for [...]

Gummel Symmetry with Higher-order Derivatives in MOSFET Compact Models

See G.H., Zhou X., Chandrasekaran K., Chiah S.B., Zhu G.J., Zhu Z.M., Lim G.H., Wei C.Q., Lin S-H, Zhu G.J., Zhu Z.M., Nanyang Technological University, SG

One of the critical problems in Gummel symmetry at higher-order derivatives that still exists in current and next generation MOS compact models has been solved with a simple modification of the mathematical smoothing function. The [...]

A charge based compact flicker noise model including short channel effects

Roy A.S., Enz C.C., EPFL, CH

The low-frequency (LF) noise in MOS devices has been the subject of intensive research during past years. It is becoming a major concern for scaled devices because the LF noise increases as the inverse of [...]

HiSIM-Varactor: Complete Surface-Potential-Based Model for RF Applications

Miyake M., Sadachika N., Matsumoto K., Navarro D., Ezaki T., Miura-Mattausch M., Mattausch H.J., Miura-Mattausch M., Ohguro T., Iizuka T., Taguchi M., Miyamoto S., Hiroshima University, JP

For RF-circuit analysis, an accurate compact model for the MOS varactor is urgently desired. We have developed such an accurate MOS varactor model HiSIM-Varactor based on the surface-potential MOSFET model HiSIM. HiSIM-Varactor includes the majority [...]

PTAT voltage generator based on an MOS voltage divider

Rossi C., Galup-Montoro C., Schneider M.C., Universidad de la Republica, UY

Little has been published on the use of charge-based compact models as tools for variable operating temperature design. We analyzed an MOS voltage divider applying the ACM model obtaining an equation relating the voltage at [...]

LINFET: A BSIM class FET model with smooth derivatives at Vds=0

Wagner L., Olsen C.M., IBM Systems Technology Group, US

The linearity of compact transistor models near Vds=0 is important for designing RF circuits. Currently compact models such as BSIM3/4 have problems around this bias point due to discontinuities in the derivatives. Recently, the PSP [...]

Charge-Based Threshold Voltage Definition for Undoped Single Gate and Symmetric Double Gate MOSFETs

Galup-Montoro C., Schneider M.C., Cunha A.I.A., Universidade Federal da Bahia - UFBA, BR

The purpose of this paper is to extend a charge-based definition of threshold voltage, already applied to conventional bulk MOSFETs to undoped single gate and symmetric double gate MOSFETs. The threshold surface potential is determined [...]

A Carrier-Based Analytic Model for Undoped Ultra-Thin-Body Silicon-on-Insulator (UTB-SOI) MOSFETs

He J., Bian W., Tao Y., Li B., Chen Y., Peking University, CN

A carrier-based analytical model for undoped (lightly doped) UTB-SOI MOSFETs is derived by solving the Poisson equation coupled to the Pao-Sah current formulation. It is also shown that the predicted I-V characteristics are in complete [...]

An Explicit Carrier-Based Compact Model for Surrounding-Gate MOSFETs

He J., Liu F., Bian W., Tao Y., Wu W., Lu K., Wang T., Chan M., Peking University, CN

An explicit carrier-based model for the undoped SRG MOSFETs has been developed by an accurate yet analytic carrier concentration approximation. This new explicit model requires no numerical iteration but more accurate and computation efficient, thus [...]

Body Bias Dependency of Substrate Current and Its Modeling for SOI Devices

Ma Y., Jeng M-C, Liu Z., Cadence Design System, Inc., US

Two competing factors affect the body bias dependence of substrate current in SOI devices. One is through drain current. The other is through electric field in channel near drain side. It is shown that with [...]

Compact Models for Asymmetric Double Gate MOSFETs

Morris H.C., Abebe H., Cumberbatch E.C., San Jose State University, US

Double-gate MOSFET's are one possible option to further extend CMOS scaling when planar MOSFET's have reached their scaling limit. This paper presents an analytic potential model for long-channel asymmetric double-gate (ADG) MOSFETs. The asymmetry is [...]

Transition Point Consideration for Velocity Saturating Four-terminal DG MOSFET Compact Model

Nakagawa T., Sekigawa T., Tsutsumi T., Hioki M., O’uchi S., Koike H., AIST, JP

We have proposed a compact model for four-terminal DG MOSFETs based on double charge-sheet model, with the velocity saturation effect as a function of carrier density profile inside the channel, with explicit handling of drain [...]

An Efficient Sectionalized Modeling Approach for Introduction of

Milovanovic V., Mijalkovic S., Delft University of Technology, NL

Modeling of breakdown phenomena is becoming central problem in today's design of high-speed bipolar circuits. It is especially important for the output stages that should simultaneously provide speed and output signal power. To this end, [...]

A Setup for Automatic MOSFET Mismatch Characterization under a Wide Bias Range

Klimach H., Galup-Montoro C., Schneider M.C., Federal University of Santa Catarina, BR

Mismatch is the denomination of time-independent variations between identically designed components. In analog circuits, the spread in the dc characteristics of supposedly matched transistors results in inaccurate or even anomalous circuit behavior. Also, for digital [...]

An Approximate Explicit Solution to General Diode Equation

He J., Tao Y., Yang C., Feng M., Li B., Bian W., Chen Y., Peking University, CN

an approximate explicit solution for a normalized diode has been developed in this paper. The accuracy of the diode current calculation and its derivative prediction has also been verified compared with the result of the [...]

Methodology and Design Kit Integration of a Broadband Compact Inductor Model

Groves R., Gordon E., IBM, US

A physics-based broadband inductor model is presented that accurately captures geometry scaling, process statistics, and temperature dependence. The model utilizes an accurate and physical skin effect formulation, with substantial improvements over previous methods, along with [...]

A Compact Model for Temperature and Frequency Dependence of Spiral Inductor

Xu Y.Z., Watt J.T., Altera Corporation, US

Spiral inductors fabricated using a 90nm CMOS process have been characterized and analyzed. The extracted series resistance increases with frequency and temperature. The extracted resistance temperature coefficient exhibits a strong dependence on operating frequency. It [...]

SPICE Modeling of Hook Shaped Idsat Curve for I/O 2.5V MOS Transistors

Tan P.B.Y., Kordesch A.V., Sidek O., Silterra Malaysia Sdn Bhd, MY

In this paper, we demonstrated how we have modified the mobility equation to accurately model the I-V characteristics of I/O 2.5V MOS transistors. Our aim is to model the effect of mechanical STI stress in [...]

HiSIM- Replacement of BSIM4 in UDSM Circuit Simulations

Iino Y., Pesic I., Silvaco Japan, JP

This paper presents HiSIM speed and convergence advantage against BSIM4 and PSP on a large variety of circuits such as memories, MPUs, PLLs, A/D and D/A converters, mixers etc.

Process Aware Hybrid SPICE Models using TCAD and Silicon Data

Mahotin Y., Tirumala S., Lin X., Pramanik D., Synopsys, Inc., US

This paper describes the methodology for extraction of process dependant hybrid SPICE compact model parameters using calibrated TCAD data and measured Silicon data. Process dependence of electrical curves is, initially, estimated using TCAD data set. [...]

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