Wu W. – TechConnect Briefs

Development of Coating Technology for Force-Feedback Application of Minimally Invasive Surgery

Kuo W-C, Wu W., Chien T., Hu H., Chong Y., National Kaohsiung First University of Science and Technology, TW

This research is to develop the coating technology in order to meet the disinfection and sterilization requirement for the tools package of minimally invasive surgery. In this study, the parylene coating is applied to protect [...]

A New Method to Fin-width Line Edge Roughness Effect Simulation of FinFET Performance

Zhu Y., Zhao W., Wang W., Wu W., Feng Z., He J., He P., He J., He P., Song L., Peking University Shenzhen SOC Key Laboratory, CN

This paper developed a full three-dimensional (3-D) statistical simulation method to investigate Fin-width Line Edge Roughness (LER) effect on the FinFETs performance. The line edge roughness is introduced by Matlab program, and then the intrinsic [...]

A Full Differential Charge Pump Based on Symmetrical Complementary Half-Current Circuit Architecture

Huang Q., Zhao W., Wang W., Wu W., Du C., Feng Z., He J., He P., He J., He P., Song L., Peking University Shenzhen SOC Key Laboratory, CN

A full differential charge pump with low current mismatch and deviation is designed in this paper based on the symmetric complementary half-current circuit architecture. It adopts two symmetrical complementary P-N replica circuits with half value [...]

Silicon Nanowire Metal-Oxide-Semiconductor Field Effect Transistor NBTI Effect Modeling and Application in Circuit Performance Simulation

Ma C., He J., He Q., Chan M., Du C., He J., He Q., Ye Y., Zhao W., Wu W., Zhang X., Wang W., PKU-HKUST Shenzhen-Hongkong Institution, CN

A Negative Bias Temperature Instability (NBTI) model for the P-typed Silicon based nanowire MOS field effect transistor (SNWFET) and its application in the circuit simulation is studied in this paper. The model is derived from [...]

Compact Negative Bias Temperature Instability Model for Nanoscale FinFET Reliability Simulation

Zhang C., Wang W., Liu Y., Ye Y., Zhao W., He J., Wu W., Peking University Shenzhen SOC Key Laboratory, CN

A compact Negative Bias Temperature Instability (NBTI) model, which is based on a novel Reaction-Trapping (R-T) theory, is proposed to predict the static and dynamic NBTI degradation in nanoscale FinFET reliability simulation. This R-T theory [...]

A Physics Based Potential Model for Cylindrical Surrounding Gate MOSFETs with SiO2- Core Si-Shell Structure

Zhang X., He J., Chan M., Du C., Ye Y., Zhao W., Wu W., Wang W., PKU-HKUST Shenzhen-Hongkong Institution, CN

A physics based potential model for intrinsic long-channel cylindrical surrounding gate MOSFETs with SiO2 -core Si-Shell structure is presented in this paper. The accurate potential solution of Poisson’s equation in a cylindrical coordinate system is [...]

Synthesis of Self-aligned Tungsten Nanowires on Single Crystalline Tungsten Substrates

Wu W., Yu Q., Pei S-S, University of Houston, US

Metallic nanowires have attracted much attention due to their unique mechanical, magnetic, optical and electronic properties, and their function as well-defined building blocks for nanodevices.1-3 Tungsten (W), in particular, is of great interest, being promising [...]

A Novel Self-Assembled and Maskless Technique for Highly Uniform Arrays of Nano-Holes And Nano-Pillars

Wu W., Dey D., Memis O.G., Katsnelson A., Mohseni H., Northwestern University, US

We present a low-cost and high-throughput process for realization of two-dimensional arrays of deep sub-wavelength features using a self-assembled monolayer of HCP silica and polystyrene microspheres and well-developed photoresist lithography. This method utilizes the microspheres [...]

An Explicit Carrier-Based Compact Model for Surrounding-Gate MOSFETs

He J., Liu F., Bian W., Tao Y., Wu W., Lu K., Wang T., Chan M., Peking University, CN

An explicit carrier-based model for the undoped SRG MOSFETs has been developed by an accurate yet analytic carrier concentration approximation. This new explicit model requires no numerical iteration but more accurate and computation efficient, thus [...]

Modeling the Geometry-Dependent Parasitics in Multi-Fin FinFETs

Chan M., Wu W., HKUST, HK

The geometry-dependent parasitic components in multi-fin FinFETs are studied. The gate-resistance has a stronger dependent on the device geometry compared with the planar MOSFETs. Parasitic fringing capacitance and overlap capacitance become highly coupled to the [...]