Chen Z. – TechConnect Briefs

Printed via technology for oxide thin film transistors and inverters

Xie M.L., Wu S.J., Wu X.Z., Chen Z., Wu S.J., Wu X.Z., Cui Z., Suzhou Institute of Nano-Tech and Nano-Bionics,Chinese Academy of Sciences, CN

In recent years, printed electronics starts to evolve from single components to systems where interconnects are essential for transistors to be connected into circuits. For complicated electronic circuits systems such as integrated circuit (IC), multilevel [...]

Semiconducting Bilayer Graphene for Device Applications

Chu T., Zhao Y., Chen Z., Purdue University, US

Owing to its unique electronic, thermal, and mechanical properties, graphene has sparked enormous scientific interest since its discovery in 2004. However, the absence of a bandgap limits its applications in electronic and optoelectronic fields. Theoretical [...]

Unified Regional Approach to High Temperature SOI DC/AC Modeling

Chiah S.B., Zhou X., Chen H-M, Chen Z., Chen H-M, Chen Z., Nanyang Technological University, SG

This paper extends the recent model development [1] to include temperature effect in a range from room temperature to 300C. The extraction of the temperature coefficients used in the model and the prediction of the [...]

Mechanical fabrication of graphene devices using focused-ion beam: deposition and milling

Lei N., Chen Z., Kim D., Xue W., Xu J., Xue W., Washington State University, US

The inherent difficulties in handling and producing graphene have been a major barrier in developing such devices. Conventional microfabrication methods are mostly based on chemical etching processes, which often involve tedious masking and aligning steps. [...]

Development of materials and printing methods for fabrication of thin-film transistors on flexible substrates

Zhao J.W., Gao Y.L., Gu W.B., Lin J., Chen Z., Cui Z., Suzhou Institute of Nanotech and nano-bionics, Chinese Academy of Sciences, CN

In the present work, we attempted to put together a suite of technologies for printing TFTs on flexible substates. The ink materials we investigated include optimized SCNT inks as printable semiconductors, development of composite ion-gel [...]

Thin film transistors with printed semiconductive oxide channel and silver source-drain electrodes

Chen Z., Cui Z., Suzhou Institute of Nano-tech and Nano-bonic, Chinese Academy of Sciences, CN

In order to make all-printed thin-film transistors, the key issue such as the interfacing effect between printed electrodes and printed semiconductive channel layer has to be solved.In this study, thin film transistors were fabricated by [...]

Stable Superhydrophobic TiO2-based Nanobelt Films with Controllable Transparence and Adhesion

Laiand Y.K., Gong D.G., Gong J.J., Tang Y.X., Gong D.G., Gong J.J., Lin C.J., Chen Z., Xiamen University, CN

Therefore, it is a challenge to develop more convenient methods to quickly deposit titanate nanostructured powder on various substrates to construct superhydrophobic films. In this work, stable TiO2-based nanobelt/fluoroalkylsilane (TNB/FAS) hybrid solution were synthesized by [...]

A Simple, Accurate Capacitance-Voltage Model of Undoped Silicon Nanowire MOSFETs

Lin S., Zhou X., See G.H., Zhu G., Wei C., Zhang J., Chen Z., Nanyang Technological University, SG

Gate-All-Around (GAA), or surrounding-gate, MOSFET is one of the most promising structures beyond bulk CMOS. In this paper, we present a simple, accurate C-V model of undoped silicon nanowire MOSFETs. Different with other models, proposed [...]

Compact Model Application to Statistical/Probabilistic Technology Variations

Zhou X., Zhu G., Srikanth M., Selvakumar R., Yan Y., Chandra W., Zhang J., Lin S., Wei C., Chen Z., Nanyang Technological University, SG

ULSI systems are designed by electronic design automation (EDA) tools with performance figures-of-merit (FOM) measured by SPICE circuit simulation, in which nonlinear transistors are modeled by the compact model (CM) with its nominal set of [...]

Interface Traps in Surface-Potential-Based MOSFET Models

Chen Z., Zhou X., See G.H., Zhu G., Zhu Z., Zhu G., Zhu Z., Nanyang Technological University, SG

Surface or interface properties along the surface channel region have great influences on the MOSFET characteristics. The interface-trap density increases during the repeated program-erase cycling of non-volatile floating-gate and SONOS memory transistors. Thus, the compact [...]