Hiroshima University – TechConnect Briefs

A Compact Model for SiC Junction Barrier Schottky Diode for High-Voltage and High-Temperature Applications

Navarro D., Herrera F., Miura-Mattausch M., Mattausch H.J., Miura-Mattausch M., Takusagawa M., Kobayashi J., Hara M., Hiroshima University, JP

SiC-based Junction Barrier Schottky (JBS) Diode is employed in power conversion applications because of its low-leakage current and high switching speed characteristics even at elevated temperatures. JBS structure originates from Schottky Barrier Diode (SBD) structure, [...]

Compact Modeling of Long-Term MOSFET Degradation for Predicting Circuits Degradation

Miyamoto H., Ma C., Mattausch H.J., Miura-Mattausch M., Tanoue H., Tanimoto Y., Kikuchihara H., Mattausch H.J., Miura-Mattausch M., Miura-Mattausch M., Hiroshima University, JP

[Introduction] Prediction methods of long-term degradation of both p- and n-type metal oxide semiconductor field effect transistors (MOSFETs) in CMOS circuits is proposed. During CMOS circuit degradation, not all the MOSFETs but only several MOSFETs [...]

Modeling of Short-Channel Effect for Ultra-Thin SOI MOSFET on Ultra-Thin BOX

Miyamoto H., Fukunaga Y., Zenitani H., Kikuchihara K., Mattausch H.J., Miura-Mattausch M., Miura-Mattausch M., Hiroshima University, JP

The SOTB-MOSFET (ultra-thin film SOI layer on ultra-thin BOX) is a candidate for the next MOSFET generations with advanced technology due to its suppression of the short-channel effect. Besides, the thin box layer can well [...]

HiSIM-SOTB: A Compact Model for SOI-MOSFET with Ultra-Thin Si-Layer and BOX

Miura-Mattausch M., Kikuchihara H., Feldmann U., Nakagawa T., Miyake M., Iizuka T., Mattausch H.J., Miura-Mattausch M., Hiroshima University, JP

The Silicon-On-Thin-Buried-Oxide (SOTB) transistor is a descendant of the conventional SOI MOSFET with thin Silicon and BOX layers. Many different structure and material variations are possible, where the choice of a thicker BOX may be [...]

Modeling of Chain History Effect based on HiSIM-SOI

Fukunaga Y., Miyake M., Toda A., Kikuchihara K., Baba S., Feldmann U., Mattausch H.J., Miura-Mattausch M., Miura-Mattausch M., Hiroshima University, JP

SOI-MOSFET is considered as a candidate for the next MOSFET generations with advanced technology due to its suppression of the short-channel effect and its high driving capability. However, it is known that the history effect [...]

Modeling of DMOS Device for High-Voltage Applications Based on 2D Current Flow

Ueno F., Tanaka A., Miyake M., Iizuka T., Yamamoto T., Kikuchihara H., Mattausch H.J., Miura-Mattausch M., Miura-Mattausch M., Hiroshima University, JP

High-voltage devices are utilized for a variety of applications, with application voltages ranging from a few volts to a few hundred volts. To develop efficient circuits for the variety of applications, accurate modeling of the [...]

Modeling of Trench-Gate Type HV-MOSFETs for Circuit Simulation

Iizuka T., Fukushima K., Tanaka A., Ueno M., Miura-Mattausch M., Hiroshima University, JP

A wide range of application has made high-voltage (HV) MOSFETs evolve into application-specific structures. Trench-gate type HV-MOSFET is one of them; its user application space tends to fall on a larger power consumption domain, compared [...]

Modeling of the impurity-gradient effect in high-voltage MOSFETs

Maekawa Y., Fukushima K., Tanaka A., Kikuchihara H., Miyake M., Mattausch H.J., Miura-Mattausch M., Miura-Mattausch M., Hiroshima University, JP

Two major high-voltage MOSFET types are commonly used by semiconductor industries. One has a symmetrical structure, and the other has a laterally-diffused asymmetric structure called LDMOS. Here our focus is the LDMOS structure, where an [...]

HiSIM-DG for Extracting Statistical Variations of Measured I-V Characteristics

Shintaku Y., Hiroshima University, JP

The variability of the DG-MOSFET is expected to cause serious problems for real circuit applications. Thus purpose of our investigation is to provide an accurate extraction of device variations, and to predict influence of the [...]

Complete Surface-Potential Modeling Approach Implemented in the HiSIM Compact Model Family for Any MOSFET Type

Miura-Mattausch M., Miyake M., Kikuchihara H., Feldmann U., Amakawa S., Mattausch H.J., Miura-Mattausch M., Hiroshima University, JP

Many possible future device structures are investigated in parallel to obtain highest performance features. It has been shown that an SOI-MOSFET with a thin body enables both high device performances and suppression of statistical variations. [...]

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