Hu C. – TechConnect Briefs

Unified Compact Model for Gate All Around FETs- Nanosheets, Nanowires, Multi Bridge Channel MOSFETs

Agarwal H., Chang H-L, Chauhan Y.S., Duarte J.P., Hu C., Kushwaha P., Lin Y-K., Sachid A., Salahuddin S., University of California Berkeley USA, US

FinFET is in mass production for its capability of scaling below 20nm. Thin silicon Fin surrounded by gate provides a superior channel electrostatics resulting in higher on current (Ion) and better subthreshold swing. The same [...]

Modeling Independent Multi-Gate MOSFET

Chang H-L, Chauhan Y.S., Duarte J.P., Hu C., Khandelwal S., University of California-Berkeley, US

In this paper a fully-featured turn-key compact model for independent multi-gate MOSFETs is presented. This industry standard compact model is called BSIM-IMG. The two independent (front- and back-gate) control of the channel charge in these [...]

InGaAs FinFET Modeling Using Industry Standard Compact Model BSIM-CMG

Chauhan Y.S., Duarte J.P., Gu J.J., Hu C., Khandelwal S., Paydavosi N., Si M., Ye P.D., University of California-Berkeley, US

In this paper, we present modeling results for InGaAs FinFETs using the industry standard compact model BSIM-CMG. We show that BSIM-CMG produces excellent fits to the measured I-V data of these devices. The difference seen [...]

Analytical Surface Potential Calculation in UTBSOI MOSFET with Independent Back-Gate Control

Chauhan Y.S., Hu C., Karim M.A., Khandelwal S., Niknejad A., Sachid A., Venugopalan S., Norwegian University of Science & Technlogy, NO

An analytical method for calculation of front- and back-gate surface-potential in ultra-thin body SOI MOSFETs is presented. The method allows surface-potential calculation with independent back-gate control which is very important in these devices. The calculated [...]

BSIM6: Symmetric Bulk MOSFET Model

Chauhan Y.S., Hu C., Karim M.A., Khandelwal S., Niknejad A., Venugopalan S., University of California-Berkeley, US

BSIM6 Model is the next generation Bulk RF MOSFET Model. Model uses charge based core with all physical models adapted from BSIM4 model. Model fulfills all quality tests e.g. Gummel symmetry and AC symmetry etc. [...]

Drain Induced Barrier Lowering (DIBL) Effect on the Intrinsic Capacitances of Nano-Scale MOSFETs

Chauhan Y.S., Hu C., Karim M.A., Lu D., Niknejad A., Venugopalan S., University of California at Berkeley, US

MOSFET intrinsic capacitances going negative is a major concern in the compact model community. Negative Intrinsic Capacitances (NIC) can raise non-convergence issues in circuit simulators. In some cases NICs can be explained using physical phenomena. [...]

Authors: Hu C.

Unified Compact Model for Gate All Around FETs- Nanosheets, Nanowires, Multi Bridge Channel MOSFETs

Modeling Independent Multi-Gate MOSFET

InGaAs FinFET Modeling Using Industry Standard Compact Model BSIM-CMG

Analytical Surface Potential Calculation in UTBSOI MOSFET with Independent Back-Gate Control

BSIM6: Symmetric Bulk MOSFET Model

Drain Induced Barrier Lowering (DIBL) Effect on the Intrinsic Capacitances of Nano-Scale MOSFETs

Compact Models for sub-22nm MOSFETs

A Versatile Multigate MOSFET Compact Model: BSIM-MG

Dynamic Behavior Model for High-k MOSFETs

BSIM4 and BSIM Multi-Gate Progress