Martin P. – TechConnect Briefs

SPICE Compact Modeling for Design of Innovative Integrated Circuits in CEA-LETI

Martin P., Lucci L., Reyboz M., Barbe J.-C., CEA-LETI, FR

This paper presents an overview of the recent compact modeling activity in CEA-LETI. Examples of Verilog-A modeling using the surface potential approach of field effect transistors, such as High Electron Mobility Transistors (HEMTs) AlGaN/GaN power [...]

A Surface-Potential-Based Compact Model of AlGaN/GaN HEMTs Power Transistors

Martin P., Hahe R., Lucci L., CEA-LETI, FR

A new physics based compact model for III-nitride HEMTs developed for SPICE circuit simulation is presented. The HSP model (acronym for HEMT Surface-Potential model) follows a physical approach for power devices modeling, as it was [...]

1/f Noise Modeling at Low Temperature with the EKV3 Compact Model

Martin P., Ghibaudo G., CEA/LETI/MINATEC, FR

Advanced compact models are mandatory for simulation of mixed analog-digital circuits working at low temperature (77-200 K). In this work, the 1/f noise model introduced in the EKV3 model is evaluated. This evaluation is performed [...]

Physical Carrier Mobility in Compact Model of Independent Double Gate MOSFET

Reyboz M., Martin P., Rozeau O., Poiroux T., CEA-LETI, FR

We have already developed an explicit threshold voltage based compact model of independent double gate MOSFET which well works for gate length between 30 nm and 1µm, or more. However, the mobility was assumed constant. [...]

MOSFET Compact Modeling Issues for Low Temperature (77 K – 200 K) Operation

Martin P., Cavelier M., Fascio R., Ghibaudo G., CEA/LETI/MINATEC, FR

Advanced compact models are evaluated for simulation of mixed analog-digital circuits working at low temperature (77 to 200 K). This evaluation is performed on a dual gate oxide CMOS technology with 0.18 µm / 1.8 [...]

Explicit Short Channel Compact Model of Independent Double Gate Mosfet

Reyboz M., Rozeau O., Poiroux T., Martin P., Cavelier M., Jomaah J., CEA-LETI, FR

This paper describes an explicit short channel compact model of Independent Double Gate (IDG) MOSFET with undoped channel. The validity of this model is demonstrated by comparison with Atlas simulations. The model was implemented in [...]

Explicit Threshold Voltage Based Compact Model of Independent Double Gate MOSFET

Reyboz M., Poiroux T., Rozeau O., Martin P., Jomaah J., CEA, FR

This paper describes an explicit compact model of Independent Double Gate (IDG) MOSFET with undoped channel. The validity of this model is demonstrated by comparisons with Atlas simulations. The model was implemented in VerilogA in [...]