The MOSFET (Metal-Oxide-Silicon Field-Effect- Transistor) or MOS Transistor (MOST) is a three dimensional electronic device. It operates on the conductivity modulation principle in a thin semiconductor layer by a controlling electric field to give amplifying [...]
, McAndrew C.
, Enz C.
, Galup-Montoro C.
, Gildenblat G.
, Hu C.
, van Langevelde R.
, Miura-Mattausch M.
, Rios R.
, Sah C-T
, Joint Paper, US
The combination of decreasing MOSFET dimensions and increasing use of MOSFETs for analog and RF application has created the need for advanced compact models for MOSFET circuit design. The first generation of MOSFET models rely [...]
Since the next generation MOSFET model will be based on either surface potential or inversion charge, a comparison between the two approaches is timely. In this paper, we will analyze in some detail the fundamentals [...]
PSP is the latest and the most advanced compact MOSFET model developed by merging the best features of the two surface potential-based models: SP (devel- oped at The Pennsylvania State University) and MM11 (developed by [...]
, Chiah S.B.
, Chandrasekaran K.
, See G.H.
, Shangguan W.Z.
, Pandey S.M.
, Cheng M.
, Chu S.
, Hsia L.-C.
, Nanyang Technological University, SG
This paper outlines the key features and advantages of the unified regional charge-based approach to MOSFET compact charge modeling in comparison with surfacepotential- based approaches. Physical piecewise solutions are regionally derived from Pao–Sah equation, in [...]
This simulation work discusses the impact of direct gate tunneling on effective mobility extraction methods, particularly the Inversion Charge Pumping (ICP) method proposed recently for transistors with high-k gate dielectrics. The valence-band electron gate tunneling [...]
The impact of the gate tunneling current (GTC) on the noise performance of MOSFETs with very thin gate oxides is studied by developing analytical expressions for the four parameters that describe the noise performance of [...]
This paper addresses several issues in noise modeling and simulation. It shows how correlated noise can be implemented in Verilog-A, and presents a new and simple technique to simulate the noise correlation coefficient using only [...]
This paper discusses the accurate modeling of resistance R, inductance L and capacitance C in sub-100nm process node and their impacts on high frequency effects such as delay, crosstalk, and power/ground bounce. Models of interconnect [...]
In this work we present compact modelling schemes, for the undoped nanoscale multiple-gate MOSFET, suitable for design and projection of these devices. The proposed models have a physical basis and assume well-tempered multiple-gate MOSFETs; i.e., [...]
A physics-based, non-charge-sheet analytic potential model is presented for undoped (or lightly doped) Double Gate (DG) MOSFETs. With only the mobile charge term included, Poisson’s equation is rigorously solved and the electrostatic potential is derived [...]
A potential-based drain current model is presented for nanoscale undoped-body symmetric double gate MOSFETs. It is based on a fully coherent physical description and consists of a single analytic equation that includes both drift and [...]
This paper discusses a feasibility of an automatic parameter extraction method with the GA (Genetic Algorithm) for surface-potential-based MOSFET model HiSIM (Hiroshima-university STARC IGFET Model), where all device characteristics are described as functions of the [...]
, Dunga M.
, Heydari B.
, Wan H.
, Lin C.H.
, Emami S.
, Doan C.
, Xi X.
, He J.
, Heydari B.
, Hu C.
, University of California at Berkeley, US
Commercial CMOS chips routinely operate at frequencies up to 5 GHz and exciting new opportunities exists in higher frequency bands such as 3-10 GHz, 17 GHz, 24 GHz, and 60 GHz. Many research groups have [...]
This paper is to review important device parameters as the figures of merit (FOM) to understand the device characteristics for analog/RF applications. These FOM should be characterized and evaluated in technology development and model generation [...]
In addition to the overall range of circuit characteristics expected from process variation the circuit designer needs to know how closely different circuit element will track one another. We describe a new methodology for modeling [...]
In this paper various modelling approaches for Laterally Double-Di used MOS (LDMOS) devices are discussed. Characterisation results for the new compact LDMOS model called MOS Model 20 are presented. Measurements of the dc-current, its conductances [...]
This paper presents the derivation of a two- and threedimensional (2D/3D) generalized Integral-Charge Control Relation (GICCR) that is based on an exact physical relation for the transfer current of bipolar transistors. The resulting compact equation [...]
This paper gives an overview of the physics and modeling of noise in SiGe HBT devices and circuits, including RF broadband noise, low-frequency noise, and oscillator phase noise. The ability to simultaneously achieve high cutoö [...]
This paper presents a physics -based compact model for a four terminal (independent top and bottom gates) junction field-effect transistor (JFET). The model describes the JFET’s dc and ac characteristics with a high degree of [...]
The purpose of this paper is to illustrate a physically-based model allowing the statistical simulations of oxide leakage currents in MOS transistors and Floating Gate memories. This model computes the leakage current through defects randomly [...]
Journal: TechConnect Briefs
Volume: Technical Proceedings of the 2005 Workshop on Compact Modeling
Published: May 8, 2005
Industry sectors: Advanced Materials & Manufacturing | Sensors, MEMS, Electronics
Topic: Nanoparticle Synthesis & Applications