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HomeAuthorsSong L.

Authors: Song L.

A New Method to Fin-width Line Edge Roughness Effect Simulation of FinFET Performance

Zhu Y., Zhao W., Wang W., Wu W., Feng Z., He J., He P., He J., He P., Song L., Peking University Shenzhen SOC Key Laboratory, CN
This paper developed a full three-dimensional (3-D) statistical simulation method to investigate Fin-width Line Edge Roughness (LER) effect on the FinFETs performance. The line edge roughness is introduced by Matlab program, and then the intrinsic [...]

A Full Differential Charge Pump Based on Symmetrical Complementary Half-Current Circuit Architecture

Huang Q., Zhao W., Wang W., Wu W., Du C., Feng Z., He J., He P., He J., He P., Song L., Peking University Shenzhen SOC Key Laboratory, CN
A full differential charge pump with low current mismatch and deviation is designed in this paper based on the symmetric complementary half-current circuit architecture. It adopts two symmetrical complementary P-N replica circuits with half value [...]

Modeling and Characterization of Wire Inductance for High Speed VLSI Design

Arora N.D., Song L., Cadence Design Systems, US
Ever increasing circuit density, operating speed, faster on-chip rise times, use of low resistance Copper (Cu) interconnects, and longer wire lengths due to high level of integration in VLSI chip designs, have necessitated the need [...]

Modeling and Characterization of High Frequency Effects in ULSI Interconnects

Arora N.D., Song L., Cadence Design Systems, US
This paper discusses the accurate modeling of resistance R, inductance L and capacitance C in sub-100nm process node and their impacts on high frequency effects such as delay, crosstalk, and power/ground bounce. Models of interconnect [...]

Modeling and Characterization of Wire Inductance for High Speed VLSI Design

Arora N.D., Song L., Cadence Design Systems, US
Ever increasing circuit density, operating speed, faster on-chip rise times, use of low resistance Copper (Cu) interconnects, and longer wire lengths due to high level of integration in VLSI chip designs, have necessitated the need [...]

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