Invited Papers

A History of MOS Transistor Compact Modeling

Sah C-T, University of Florida, US

The MOSFET (Metal-Oxide-Silicon Field-Effect- Transistor) or MOS Transistor (MOST) is a three dimensional electronic device. It operates on the conductivity modulation principle in a thin semiconductor layer by a controlling electric field to give amplifying [...]

Advanced Compact Models for MOSFETs

Watts J., McAndrew C., Enz C., Galup-Montoro C., Gildenblat G., Hu C., van Langevelde R., Miura-Mattausch M., Rios R., Sah C-T, Joint Paper, US

The combination of decreasing MOSFET dimensions and increasing use of MOSFETs for analog and RF application has created the need for advanced compact models for MOSFET circuit design. The first generation of MOSFET models rely [...]

Comparison of Surface Potential and Charge-based MOSFET Core Models

Galup-Montoro C., Schneider M., Pahim V.C., Rios R., Universidade Federal de Santa Catarina, BR

Since the next generation MOSFET model will be based on either surface potential or inversion charge, a comparison between the two approaches is timely. In this paper, we will analyze in some detail the fundamentals [...]

Introduction to PSP MOSFET Model

Gildenblat G., Li X., Wang H., Wu W., van Langevelde R., Scholten A.J., Smit G.D.J., Klaassen D.B.M., Pennsylvania State University, US

PSP is the latest and the most advanced compact MOSFET model developed by merging the best features of the two surface potential-based models: SP (devel- oped at The Pennsylvania State University) and MM11 (developed by [...]

Unified Regional Charge-based Versus Surface-potential-based Compact Modeling Approaches

Zhou X., Chiah S.B., Chandrasekaran K., See G.H., Shangguan W.Z., Pandey S.M., Cheng M., Chu S., Hsia L.-C., Nanyang Technological University, SG

This paper outlines the key features and advantages of the unified regional charge-based approach to MOSFET compact charge modeling in comparison with surfacepotential- based approaches. Physical piecewise solutions are regionally derived from Pao–Sah equation, in [...]

Mobility Extraction and Compact Modeling for FETs Using High-K Gate Materials

Dutton R.W., Liu Y., Choi C-H, Chen T.W., Stanford University, US

This simulation work discusses the impact of direct gate tunneling on effective mobility extraction methods, particularly the Inversion Charge Pumping (ICP) method proposed recently for transistors with high-k gate dielectrics. The valence-band electron gate tunneling [...]

The Effects of the Gate Tunneling Current on the High Frequency Noise Parameters of MOSFETs

Deen J., Ranuárez J.C., Chen C-H, McMaster University, CA

The impact of the gate tunneling current (GTC) on the noise performance of MOSFETs with very thin gate oxides is studied by developing analytical expressions for the four parameters that describe the noise performance of [...]

Correlated Noise Modeling and Simulation

McAndrew C., Coram G., Blaum A., Pilloud O., Freescale Semiconductor, US

This paper addresses several issues in noise modeling and simulation. It shows how correlated noise can be implemented in Verilog-A, and presents a new and simple technique to simulate the noise correlation coefficient using only [...]

Modeling and Characterization of High Frequency Effects in ULSI Interconnects

Arora N.D., Song L., Cadence Design Systems, US

This paper discusses the accurate modeling of resistance R, inductance L and capacitance C in sub-100nm process node and their impacts on high frequency effects such as delay, crosstalk, and power/ground bounce. Models of interconnect [...]

Compact Model of Multiple-gate SOI MOSFETs

Iñiguez B., Hamid H.A., Jiménez D., Roig J., Universitat Rovira i Virgili, ES

In this work we present compact modelling schemes, for the undoped nanoscale multiple-gate MOSFET, suitable for design and projection of these devices. The proposed models have a physical basis and assume well-tempered multiple-gate MOSFETs; i.e., [...]

Physics-Based, Non-Charge-Sheet Compact Modeling of Double-Gate MOSFETs

Lu H., Taur Y., University of California at San Diego, US

A physics-based, non-charge-sheet analytic potential model is presented for undoped (or lightly doped) Double Gate (DG) MOSFETs. With only the mobile charge term included, Poisson’s equation is rigorously solved and the electrostatic potential is derived [...]

Analytic Solution for the Drain Current of Undoped Symmetric Dual-Gate MOSFET

Ortiz-Conde A., García-Sánchez F.J., Malobabic S., Muci J., Universidad Simón Bolívar, VE

A potential-based drain current model is presented for nanoscale undoped-body symmetric double gate MOSFETs. It is based on a fully coherent physical description and consists of a single analytic equation that includes both drift and [...]

RF-MOSFET Model Parameter Extraction with HiSIM

Miura-Mattausch M., Sadachika N., Murakawa M., Mimura S., Higuchi T., Itoh K., Inagaki R., Iguchi Y., Hiroshima University, JP

This paper discusses a feasibility of an automatic parameter extraction method with the GA (Genetic Algorithm) for surface-potential-based MOSFET model HiSIM (Hiroshima-university STARC IGFET Model), where all device characteristics are described as functions of the [...]

Challenges in Compact Modeling for RF and Microwave Applications

Niknejad A., Dunga M., Heydari B., Wan H., Lin C.H., Emami S., Doan C., Xi X., He J., Heydari B., Hu C., University of California at Berkeley, US

Commercial CMOS chips routinely operate at frequencies up to 5 GHz and exciting new opportunities exists in higher frequency bands such as 3-10 GHz, 17 GHz, 24 GHz, and 60 GHz. Many research groups have [...]

A Study of Figures of Merit for the High Frequency Behavior of MOSFETs in RF IC Applications

Cheng Y., Siliconlinx, US

This paper is to review important device parameters as the figures of merit (FOM) to understand the device characteristics for analog/RF applications. These FOM should be characterized and evaluated in technology development and model generation [...]

Modeling FET Variation Within a Chip as a Function of Circuit Design and Layout Choices

Watts J., Lu N., Bittner C., Grundon S., Oppold J., IBM, US

In addition to the overall range of circuit characteristics expected from process variation the circuit designer needs to know how closely different circuit element will track one another. We describe a new methodology for modeling [...]

Compact Modelling of High-Voltage LDMOS Devices

Aarts A.C.T., van der Hout R., van Langevelde R., van der Hout R., van Langevelde R., Scholten A.J., Willemsen M.B., Klaassen D.B.M., Philips Research Laboratories, NE

In this paper various modelling approaches for Laterally Double-Di used MOS (LDMOS) devices are discussed. Characterisation results for the new compact LDMOS model called MOS Model 20 are presented. Measurements of the dc-current, its conductances [...]

Two-/Three-Dimensional GICCR for Si/SiGe Bipolar Transistors

Tran H., University of Technology Dresden, DE

This paper presents the derivation of a two- and threedimensional (2D/3D) generalized Integral-Charge Control Relation (GICCR) that is based on an exact physical relation for the transfer current of bipolar transistors. The resulting compact equation [...]

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