WCM – Compact Modeling – TechConnect Briefs

Drain Current Model for Thin Body Undoped and Lightly Doped Double-Gate MOSFETs

Abd Elhamid H., Ineguez B., Ismail Y., Deen MJ., Zewail City of Science and Technology, EG

We developed new compact models that include the QM effects on electrical properties such as the surface potential, and drain current. The models were used to study the impact of subband engineering and holes/electrons IMREF [...]

Effects of sub-threshold operation on 32 nm technology node PMOSFETs evaluated from the perspective of two-stage NBTI model

Hussin H., Soin N., Bukhori M.F., Universiti Teknologi MARA, MY

We investigate the subthreshold operation effects on NBTI reliability issues in the framework of two-stage NBTI model. This is to include the effect of oxide trap since most previous simulation-based study only focuses on interface [...]

Investigation on Impact of Different Defects based on Different Trap Energy Level in the Framework of Two-Stage NBTI model

Hussin H., Soin N., Bukhori M.F., Universiti Teknologi MARA, MY

Charges in gate dielectric significantly degraded the p-MOSFET device performances particularly due to NBTI phenomenon. The validation of NBTI effects on device and circuit performance require accurate model to ensure reliable prediction during design phase. [...]

Modeling of Short-Channel Effect for Ultra-Thin SOI MOSFET on Ultra-Thin BOX

Miyamoto H., Fukunaga Y., Zenitani H., Kikuchihara K., Mattausch H.J., Miura-Mattausch M., Miura-Mattausch M., Hiroshima University, JP

The SOTB-MOSFET (ultra-thin film SOI layer on ultra-thin BOX) is a candidate for the next MOSFET generations with advanced technology due to its suppression of the short-channel effect. Besides, the thin box layer can well [...]

InGaAs FinFET Modeling Using Industry Standard Compact Model BSIM-CMG

Khandelwal S., Duarte J.P., Paydavosi N., Chauhan Y.S., Gu J.J., Si M., Ye P.D., Hu C., University of California-Berkeley, US

In this paper, we present modeling results for InGaAs FinFETs using the industry standard compact model BSIM-CMG. We show that BSIM-CMG produces excellent fits to the measured I-V data of these devices. The difference seen [...]

NQS Modeling of independent DG MOSFET using RTA Approach

Sharan N., Mahapatra S., Indian Institute of Science, IN

We propose a new set of Relaxation Time Approximation (RTA) based Non Quasi Static (NQS) model for independent double gate MOSFETs by taking into account the fact that any gate can be the dominant gate. [...]

A Physics Based Potential Model for Cylindrical Surrounding Gate MOSFETs with SiO2- Core Si-Shell Structure

Zhang X., He J., Chan M., Du C., Ye Y., Zhao W., Wu W., Wang W., PKU-HKUST Shenzhen-Hongkong Institution, CN

A physics based potential model for intrinsic long-channel cylindrical surrounding gate MOSFETs with SiO2 -core Si-Shell structure is presented in this paper. The accurate potential solution of Poisson’s equation in a cylindrical coordinate system is [...]

Analytic Compact Model of Ballistic and Quasi-ballistic Cylindrical Gate-All-Around MOSFET Incorporating Drain-Induced Barrier Lowering Effect

Cheng H., Uno S., Nakazato K., graduate school of engineering, Nagoya University, JP

Gate-All-Around metal-oxide-semiconductor field effect transistors (GAA-MOSFETs) have been attracting ever-increasing attention. The numerical calculations including quantum mechanical effect and ballistic transport of drain current can be evaluated quite accurately. However, it takes an immense amount [...]

An Analytic Potential Based Model for Gate-All-Around Nanowire Tunnel-FETs

Liu Y., He J., Chan M., Peking University Shenzhen SOC Key Laboratory, CN

In this paper, an analytic potential based current model of the gate-all-around (GAA) silicon nanowire tunnel-FETs (NW-TFETs) is proposed based on the surface potential solutions at the channel direction and considering band to band tunneling [...]

Compact Model Characteristics for Generic MIS-HEMTs

Zhou H.T., Zhou X., Chiah S.B., Syamal B., Zhou H.T., Zhou X., Ajaykumar A., Liu X., Nanyang Technological University, SG

III-V channel field-effect transistors (FETs), such as metal–insulator–semiconductor high electron-mobility transistors (MIS-HEMTs), have emerged as promising candidates for future generation high-frequency, high-voltage, and high-power applications. Development of a compact model for generic HEMTs in III-V/Si [...]

Analysis of Breakdown Characteristics in Gate and Source Field-Plate AlGaN/GaN HEMTs

Onodera H., Hanawa H., Horio K., Shibaura Institute of Technology, JP

AlGaN/GaN HEMTs are now receiving great attention because of their applications to high-power microwave devices. It is known that the introduction of field plate enhances the power performance of AlGaN/GaN HEMTs, because the off-state breakdown [...]

RF-noise modeling in MOSFETs: excess noise, symmetry, and causality

Smit G.D.J., Scholten A.J., Pijper R.M.T., Tiemeijer L.F., van der Toorn R., Klaassen D.B.M., Scheer P., Juge A., NXP Semiconductors, NL

Modeling of RF-noise in MOSFET channels is one of the cornerstones for RF-CMOS-circuit design. Deep sub-micron technology nodes necessitate a proper treatment of excess noise as well as detailed modeling of parasitics. In addition, demanding [...]

Passive Elements Modeling in Microwave/Millimeter-wave application

Wang Y., Yao J., Luo J., Tang Y., Tsinghua University, CN

Passive elements (e.g., transmission line, transformer and balun) are widely used in Microwave/ Millimeter-wave (MMW) applications. Compared with time-consuming Electromagnetic (EM) simulation, equivalent-circuit compact models for these passive elements are more preferable for IC designers. [...]

Trap-induced apparent linearity of CNTFETs (invited)

Haferlach M., Claus M., TU Dresden, DE

Compared to conventional bulk semiconductors carbon nanotubes (CNTs) possess a number of properties which may make CNT technology superior for certain applications. In particular, the one-dimensional (1D) transport in CNTs leads not only to a [...]

Compact Negative Bias Temperature Instability Model for Nanoscale FinFET Reliability Simulation

Zhang C., Wang W., Liu Y., Ye Y., Zhao W., He J., Wu W., Peking University Shenzhen SOC Key Laboratory, CN

A compact Negative Bias Temperature Instability (NBTI) model, which is based on a novel Reaction-Trapping (R-T) theory, is proposed to predict the static and dynamic NBTI degradation in nanoscale FinFET reliability simulation. This R-T theory [...]

Simulation Study on Dopant Fluctuation Impact on SRG MOSFET Device and Circuit Performane

Wang H., He J., Liu Y., Peking University Shenzhen SOC Key Laboratory, CN

This paper investigates the impact of random dopant fluctuation on surrounding gate MOSFET, from atomic statistical simulation of device to circuit performance evaluation. The doping profile is generated by an analysis of each lattice atom [...]

Silicon Nanowire Metal-Oxide-Semiconductor Field Effect Transistor NBTI Effect Modeling and Application in Circuit Performance Simulation

Ma C., He J., He Q., Chan M., Du C., He J., He Q., Ye Y., Zhao W., Wu W., Zhang X., Wang W., PKU-HKUST Shenzhen-Hongkong Institution, CN

A Negative Bias Temperature Instability (NBTI) model for the P-typed Silicon based nanowire MOS field effect transistor (SNWFET) and its application in the circuit simulation is studied in this paper. The model is derived from [...]

A Threshold Voltage Modeling for a Spacer Trapping Memory Cell Using Verilog-A

Shrimali H., Liberali V., Università degli Studi di Milano, IT

The threshold voltage of the flash memories varies with respect to the applied voltages at the respective terminal of a memory cell. This paper presents the modeling of the threshold voltage variation for an embedded [...]

Developing a Common Compact Modeling Platform for Model Developers and Users

Zhang L., Chan M., HKUST, HK

With the recent advance of CMOS technology to the 32nm range, there is a major concern to continue the scaling roadmap. Many new devices have been proposed, but selecting the right structure is not a [...]

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