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HomeAuthorsDuarte J.P.

Authors: Duarte J.P.

Unified Compact Model for Gate All Around FETs- Nanosheets, Nanowires, Multi Bridge Channel MOSFETs

Agarwal H., Chang H-L, Chauhan Y.S., Duarte J.P., Hu C., Kushwaha P., Lin Y-K., Sachid A., Salahuddin S., University of California Berkeley USA, US
FinFET is in mass production for its capability of scaling below 20nm. Thin silicon Fin surrounded by gate provides a superior channel electrostatics resulting in higher on current (Ion) and better subthreshold swing. The same [...]

Modeling Independent Multi-Gate MOSFET

Chang H-L, Chauhan Y.S., Duarte J.P., Hu C., Khandelwal S., University of California-Berkeley, US
In this paper a fully-featured turn-key compact model for independent multi-gate MOSFETs is presented. This industry standard compact model is called BSIM-IMG. The two independent (front- and back-gate) control of the channel charge in these [...]

InGaAs FinFET Modeling Using Industry Standard Compact Model BSIM-CMG

Chauhan Y.S., Duarte J.P., Gu J.J., Hu C., Khandelwal S., Paydavosi N., Si M., Ye P.D., University of California-Berkeley, US
In this paper, we present modeling results for InGaAs FinFETs using the industry standard compact model BSIM-CMG. We show that BSIM-CMG produces excellent fits to the measured I-V data of these devices. The difference seen [...]

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