An A Priori Hysteresis Modeling Methodology for Improved Efficiency and Model Accuracy in Advanced PD SOI Technologies

, , , , , , , , , , , , , , , ,
Exploiting the asymmetric nature of interactions among hysteresis, “nonFET”, and DC characteristics, an a priori hysteresis modeling methodology has been proposed as an essential part of an improved model extraction flow for advanced PD SOI [...]

The Surface-Potential-Based model HiSIM-SOI and its Application to 1/f Noise in Fully-Depleted SOI-MOSFETs

, , , , , , , , , , , ,
Fully-depleted SOI-MOSFET model HiSIM-SOI for circuit simulation is developed. HiSIM-SOI solves surface potentials at all three SOI-surfaces along the depth direction self-consistently. Besides comparison to measured I-V characteristics, the model is verified with 1/f noise [...]

One-Iteration Parameter Extraction for Length/width-dependent Threshold Voltage and Unified Drain Current Model

, , , , , , , , , ,
This paper presents calibration approach for our unified length/width-dependent MOSFET drain current (Ids) model [1] with the length/width-dependent threshold voltage (Vt) model [2] for technology characterization in the entire geometry/bias range for CMOS shallow trench [...]