Papers – TechConnect Briefs

A History of MOS Transistor Compact Modeling

Sah C-T, University of Florida, US

The MOSFET (Metal-Oxide-Silicon Field-Effect- Transistor) or MOS Transistor (MOST) is a three dimensional electronic device. It operates on the conductivity modulation principle in a thin semiconductor layer by a controlling electric field to give amplifying [...]

Vector Potential Equivalent Circuit for Efficient Modeling of Interconnect Inductance

Pacelli A., SUNY-Stony Brook, US

We present a compact topology for inductive parasitics, using the vector potential as a state variable. The model is local, i.e., only coupling between neighboring wires is explicitly modeled. However, the topology accounts for long-range [...]

Compact Modeling for RF and Microwave Integrated Circuits

Niknejad A.M., Chan M., Hu C., Brodersen B., Xi J., He J., Emami S., Doan C., Cao Y., Su P., Wan H., Dunga M., Lin C.H., University of California at Berkeley, US

Compact modeling has been an integral part of the design of integrated circuits for digital and analog applications. The availability of scalable CMOS device models has enabled rapid simulation and design of present and future [...]

Physical Modeling of Substrate Resistance in RF MOSFETs

Han J., Je M., Shin H., Korea Advanced Institute of Science & Technology, KR

A simple and accurate method is presented for extracting the substrate resistance of RF MOSFETs. The extraction results for 0.18 um MOSFETs are shown for various bias conditions. The dependence of the extracted substrate resistances [...]

Noise Modeling with MOS Model 11 for RF-CMOS Applications

Scholten A.J., Tiemeijer L.F., van Langevelde R., Zegers-van Duijnhoven A.T.A., Havens R.J., Zegers-van Duijnhoven A.T.A., Venezia V.C., Klaassen D., Philips Research Laboratories Eindhoven, NE

The RF noise in 0.18um CMOS technology has been measured and modeled. Compared to long-channel theory we find only a moderate enhancement of the drain and current noise for short-channel MOSFETS and, due to the [...]

Compact Bipolar Transistor Modeling – Issues and possible solutions

Schroter M., University of Technology Dresden, DE

Recently, several advanced compact bipolar transistor models ave become available to the design community. For existing technologies, these models (and their internal formulation) are believed to offer sufficient flexibility and accuracy, especially compared to the [...]

BJT Modeling with VBIC, Basics and V1.3 Updates

McAndrew C., Bettinger T., Lemaitre L., Tutt M., Motorola, US

This paper reviews the VBIC BJT model, and details updates in the version 1.3 release. VBICv1.3 includes explicit interaction with siulator global parameters gmin and pnjmaxi, explicit limiting of local temperature rise and exponential arguments [...]

A Physics-Based Compact Model for Nano-Scale DG and FD/SOI MOSFETs

Fossum J., Ge L., Chiang M-H, University of Florida, US

A process/physics-based compact model (UFDG) for double-gate (DG) MOSFETs is overviewed. The model, in essence, is a compact Poisson-Schrödinger solver, including accountings for short-channel effects, and is applicable to nano-scale fully depleted (FD) SOI MOSFETs [...]

A Framework for Generic Physics Based Double-Gate MOSFET Modeling

Chan M., Taur Y., Lin C.H., He J., Niknejad A., Hu C., Hong Kong University of Science & Technology, HK

This paper presents a framework to develop a generic and physical Double-Gate MOSFET model. Due to limited available physical data and existence of a large variety of device structures, flexibility to assemble model modules to [...]

A Technology-based Compact Model for Predictive Deep-Submicron MOSFET Modeling and Characterization

Zhou X., Chiah S.B., Lim K.Y., Nanyang Technological University, SG

This paper presents new development results of our compact model (Xsim) for deep-submicron MOSFETs. Although a threshold-voltage-based and source-referenced regional model, Xsim meets the basic requirements of continuity (to third-order derivatives), scalability (entire geometry range), [...]