Assad F. – TechConnect Briefs

On Idlow with Emphasis on Speculative SPICE Modeling

An J.X., Assad F., Chen Q., Goo J-S, Icel A.B., Krishnan S., Ly T., Radwin M., Subba N., Suryagandh S., Thuruthiyil C., Wu Z-Y, Yonemura J., Advanced Micro Devices, US

An empirical correlation model of Idlow, the MOSFET drain current measured at Vgs=Vdd/2 and Vds=Vdd, where Vdd is the supply voltage, is proposed based on the alpha-power law model. It enables a comprehensive analysis of [...]

An A Priori Hysteresis Modeling Methodology for Improved Efficiency and Model Accuracy in Advanced PD SOI Technologies

An J.X., Assad F., Cai X., Chen Q., Goo J-S, Icel A.B., Ly T., Pelella M.M., Radwin M., Subba N., Suryagandh S., Thuruthiyil C., Wu Z-Y, Yonemura J., Zamudio L., Advanced Micro Devices, US

Exploiting the asymmetric nature of interactions among hysteresis, “nonFET”, and DC characteristics, an a priori hysteresis modeling methodology has been proposed as an essential part of an improved model extraction flow for advanced PD SOI [...]

Modeling On-Currents for n-MOSFETs: Ultimate Limits vs. the NTRS

Assad F., Datta S., Lundstrom M.S., Ren Z., Vasileska D., Purdue University, US

The continued evolution of Si technology hinges to a large extent on the ability to maintain high on-currents while achieving low off-currents. As we move from sub-micron to nanoscale technology, it is not at all [...]