This paper presents calibration approach for our unified length/width-dependent MOSFET drain current (Ids) model  with the length/width-dependent threshold voltage (Vt) model  for technology characterization in the entire geometry/bias range for CMOS shallow trench isolation (STI) transistors. The model has been formulated with built-in physical effects to account for short-channel/ narrow-width effects while maintaining Gummel symmetry . Through a one-iteration parameter extraction, the model can predict accurately the experimental data from a 0.11-_m CMOS STI technology wafer.
Journal: TechConnect Briefs
Volume: Technical Proceedings of the 2005 Workshop on Compact Modeling
Published: May 8, 2005
Pages: 143 - 146
Industry sectors: Advanced Materials & Manufacturing | Sensors, MEMS, Electronics
Topics: Nanoparticle Synthesis & Applications