TechConnect Briefs
  • Briefs Home
  • Volumes
  • About
    • TechConnect Briefs
    • Submissions
    • Editors
  • TechConnect
Home2012June

Month: June 2012

TechConnect Proceedings Papers

Leakage current in HfO2 stacks: from physical to compact modeling

Larcher L., Padovani A., Pavan P., Università di Modena e Reggio Emilia, IT
First, we present a Monte-Carlo model we developed for describing the charge transport in hafnium-based stacks, which allows reproducing voltage and temperature dependencies of the leakage current along with its statistical distribution. The model accounts [...]

Field-Based 3D Capacitance Modeling for sub-45-nm On-Chip Interconnect

Zhang A., Zhao W., Ye Y., He J., Chen A., Chan M., Beijing University of Aeronautics and Astronautics, CN
Considering both two-dimensional and three-dimensional single wire above plate, the proposed method decomposes the electric field into various regions and gives solutions for each part. The total ground capacitance is the summation of all components. [...]

A Charge Based Non-Quasi-Static Transient Model for SOI MOSFETs

Zhang J., He H., He J., Ye Y., He H., He J., Chan M., Peking University, CN
A non-quasi-static (NQS) transient model for SOI MOSFETs is presented based on charge based dc model which is extensively verified with various structure parameters. From the inversion charge and current-continuity equation, the partial differential equation [...]

Unified Regional Approach to High Temperature SOI DC/AC Modeling

Chiah S.B., Zhou X., Chen H-M, Chen Z., Chen H-M, Chen Z., Nanyang Technological University, SG
This paper extends the recent model development [1] to include temperature effect in a range from room temperature to 300C. The extraction of the temperature coefficients used in the model and the prediction of the [...]

HiSIM-SOTB: A Compact Model for SOI-MOSFET with Ultra-Thin Si-Layer and BOX

Miura-Mattausch M., Kikuchihara H., Feldmann U., Nakagawa T., Miyake M., Iizuka T., Mattausch H.J., Miura-Mattausch M., Hiroshima University, JP
The Silicon-On-Thin-Buried-Oxide (SOTB) transistor is a descendant of the conventional SOI MOSFET with thin Silicon and BOX layers. Many different structure and material variations are possible, where the choice of a thicker BOX may be [...]

Modeling of Chain History Effect based on HiSIM-SOI

Fukunaga Y., Miyake M., Toda A., Kikuchihara K., Baba S., Feldmann U., Mattausch H.J., Miura-Mattausch M., Miura-Mattausch M., Hiroshima University, JP
SOI-MOSFET is considered as a candidate for the next MOSFET generations with advanced technology due to its suppression of the short-channel effect and its high driving capability. However, it is known that the history effect [...]

A Simplified Model for Dynamic Depletion in Doped UTB-SOI/DG-FinFETs

Zhou X., Chiah S.B., Nanyang Technological University, SG
Compact modeling for doped-body MOSFETs, such as ultra-thin body (UTB) SOI and double-gate (DG) FinFETs, represents the most challenging task since it involves the Poisson’s solution with two boundary conditions, which is not available when [...]

Analytical Surface Potential Calculation in UTBSOI MOSFET with Independent Back-Gate Control

Khandelwal S., Chauhan Y.S., Karim M.A., Venugopalan S., Sachid A., Niknejad A., Hu C., Norwegian University of Science & Technlogy, NO
An analytical method for calculation of front- and back-gate surface-potential in ultra-thin body SOI MOSFETs is presented. The method allows surface-potential calculation with independent back-gate control which is very important in these devices. The calculated [...]

Physics based Analytical Model for a Pocket Doped p-n-p-n Tunnel Field Effect Transistor

Narang R., Saxena M., Gupta M., Gupta R.S., Gupta M., Gupta R.S., University of Delhi, South Campus, IN
Tunnel FET working on the principle of band-to-band tunneling mechanism has come up as a promising candidate with advantages of going below the limitation of 60mV/decade sub-threshold slope, and lower leakage current and thus capable [...]

Critical review of CNTFET compact models

Claus M., Haferlach M., Gross D., Technische Universität Dresden, DE
The very recent progress in manufacturing carbon nanotube transistors (CNTFETs) makes these transistors attractive for analog HF circuit applications for which adequate compact models accurately describing the transistor behavior are needed. So far, most models [...]

Posts pagination

« 1 … 32 33 34 … 73 »

About TechConnect Briefs

TechConnect Briefs is an open access journal featuring over 10,000 applications-focused research papers, published by TechConnect and aligned with over 20 years of discovery from the annual Nanotech and the TechConnect World Innovation Conferences.

Full Text Search

TechConnect World

June 17-19, 2024 • Washington, DC

TechConnect Online Community

» Free subscription!

Topics

3D Printing Advanced Manufacturing Advanced Materials for Engineering Applications AI Innovations Biofuels & Bioproducts Biomaterials Cancer Nanotechnology Carbon Capture & Utilization Carbon Nano Structures & Devices Catalysis Chemical, Physical & Bio-Sensors Coatings, Surfaces & Membranes Compact Modeling Composite Materials Diagnostics & Bioimaging Energy Storage Environmental Health & Safety of Nanomaterials Fuel cells & Hydrogen Graphene & 2D-Materials Informatics, Modeling & Simulation Inkjet Design, Materials & Fabrication Materials Characterization & Imaging Materials for Drug & Gene Delivery Materials for Oil & Gas Materials for Sustainable Building MEMS & NEMS Devices, Modeling & Applications Micro & Bio Fluidics, Lab-on-Chip Modeling & Simulation of Microsystems Nano & Microfibrillated Cellulose Nanoelectronics Nanoparticle Synthesis & Applications Personal & Home Care, Food & Agriculture Photonic Materials & Devices Printed & Flexible Electronics Sensors - Chemical, Physical & Bio Solar Technologies Sustainable Materials Water Technologies WCM - Compact Modeling
  • Sitemap
  • Contact

Copyright © TechConnect a Division of ATI | All rights reserved.