Saxena M. – TechConnect Briefs

Physics based Analytical Model for a Pocket Doped p-n-p-n Tunnel Field Effect Transistor

Gupta M., Gupta R.S., Narang R., Saxena M., University of Delhi, South Campus, IN

Tunnel FET working on the principle of band-to-band tunneling mechanism has come up as a promising candidate with advantages of going below the limitation of 60mV/decade sub-threshold slope, and lower leakage current and thus capable [...]

Analytical Drain Current Model for Damaged Gate All Around (GAA) MOSFET Including Quantum and Velocity Overshoot Effects

Gautam R., Gupta M., Gupta R.S., Saxena M., University of Delhi, South Campus, IN

The Cylindrical Gate All Around (GAA) Nanowire MOSFET exhibits strong drive currents and reduced short channel effects due to enhanced gate control and high surface quality of NW channels [1]. Apart from short channel immunity, [...]

Compact Analytical Threshold Voltage Model for Nanoscale Multi-Layered-Gate Electrode Workfunction Engineered Recessed Channel (MLGEWE-RC) MOSFET

Chaujar R., Gupta M., Gupta R.S., Kaur R., Saxena M., University of Delhi, IN

In this paper, compact analytical threshold voltage model for multi-layered-gate electrode workfunction engineered recessed channel (MLGEWE-RC) MOSFET is presented and investigated using ATLAS device simulator. The novel device continues merits of recessed channel and dual [...]

Comparison of Three Region Multiple Gate Nanoscale Structures for Reduced Short Channel Effects and High Device Reliability

Goel K., Gupta M., Gupta R.S., Saxena M., Professor, IN

We have modeled a new structure TRIMGAS which has 3 gate materials in the gate and an oxide stack. we have compared various parameters to see whether this strucure is superior to any of our [...]

Authors: Saxena M.

Physics based Analytical Model for a Pocket Doped p-n-p-n Tunnel Field Effect Transistor

Analytical Drain Current Model for Damaged Gate All Around (GAA) MOSFET Including Quantum and Velocity Overshoot Effects

Compact Analytical Threshold Voltage Model for Nanoscale Multi-Layered-Gate Electrode Workfunction Engineered Recessed Channel (MLGEWE-RC) MOSFET

An Iterative Approach to Characterize Various Advanced Non-Uniformly Doped Channel Profiles

Pre-Distortion Assessment of Workfunction Engineered Multilayer Dielectric Design of DMG ISE SON MOSFET

Assessment of L-DUMGAC MOSFET for High Performance RF Applications with Intrinsic Delay and Stability as Design Tools

Comparison of Three Region Multiple Gate Nanoscale Structures for Reduced Short Channel Effects and High Device Reliability