Papers:
Analytical Surface Potential Solution for Low Effective Mass Channel Common Double Gate MOSFET
Obtaining an accurate although computationally efficient analytic solution for surface potential is the key step towards developing compact model for Low Effective Mass channel material Common Double Gate (CDG) MOSFETs [1]. In our previous work [...]
Experiment and Model for Distance-Dependent Mismatch
We study distance-dependent mismatch and spatial correlation problems both experimentally and theoretically. The two problems are intimately connected. We present our hardware results and, using the relationship between mismatch and correlation, show that the relationship [...]
A Predictive Resistive RAM Compact Model with Synaptic Behavior for Circuit Simulations
Artificial intelligence has come to its new era with the fast growth of machine learning algorithm. However, the conventional Von-Neumann architecture could consume excessive energy during the training process. At this moment, the memristor sheds [...]
ASM-HEMT: Industry Standard GaN HEMT Model for Power and RF Applications
HEMTs based on GaN have become immensely ubiquitous in the past decade and offer a strong competition to mature technologies like silicon primarily due to the superior characteristics offered by the GaN material system over [...]
A Compact Model for SiC Junction Barrier Schottky Diode for High-Voltage and High-Temperature Applications
Navarro D., Herrera F., Miura-Mattausch M., Mattausch H.J., Miura-Mattausch M., Takusagawa M., Kobayashi J., Hara M., Hiroshima University, JP
SiC-based Junction Barrier Schottky (JBS) Diode is employed in power conversion applications because of its low-leakage current and high switching speed characteristics even at elevated temperatures. JBS structure originates from Schottky Barrier Diode (SBD) structure, [...]
Flexible virtual source compact model for fast modeling of new channel materials and device architectures
The end of bulk silicon-based transistor technology has often been predicted in the scientific and technical literature. As a result, many new channel materials (such as III-V semiconductors, 2D materials, nanowires and -tubes) and device [...]
Unified Compact Model for Gate All Around FETs- Nanosheets, Nanowires, Multi Bridge Channel MOSFETs
Kushwaha P., Duarte J.P., Lin Y-K., Agarwal H., Chang H-L, Sachid A., Salahuddin S., Chauhan Y.S., Hu C., University of California Berkeley USA, US
FinFET is in mass production for its capability of scaling below 20nm. Thin silicon Fin surrounded by gate provides a superior channel electrostatics resulting in higher on current (Ion) and better subthreshold swing. The same [...]
A turn‐on DC surface‐potential‐based drain current model for fully‐depleted poly‐Si thin film transistors
A turn‐on DC surface‐potential‐based drain current model for fully‐depleted polycrystalline silicon thin film transistors is developed based on the charge sheet model considering both deep and tail acceptor trap states in the grain boundary and [...]
Hybrid Process Design Kit: Single-Chip Monolithic III-V/Si Cascode GaN-HEMT
In this paper, we present the design of a cascode GaN-HEMT (CGH) structure in the monolithic integration of III-V/Si fabrication platform to fabricate monolithic III-V/Si CGH structures on a single chip by using hybrid process [...]
Journal: TechConnect Briefs
Volume: 4, Informatics, Electronics and Microsystems: TechConnect Briefs 2018
Published: May 13, 2018
Industry sector: Sensors, MEMS, Electronics
Topic: WCM - Compact Modeling
ISBN: 978-0-9988782-1-8