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HomeAuthorsChiang M-H

Authors: Chiang M-H

A Predictive Resistive RAM Compact Model with Synaptic Behavior for Circuit Simulations

Lee J.W., Hsu C.-H., Chiang M-H, National Cheng Kung University, TW
Artificial intelligence has come to its new era with the fast growth of machine learning algorithm. However, the conventional Von-Neumann architecture could consume excessive energy during the training process. At this moment, the memristor sheds [...]

Performance Comparison of Non-planar MOSFETs

Liao Y.-B., Chiang M-H, Hsu W.-C., National Ilan University, TW
To gain insights into device variability, device scalability and even circuit performance, more comprehensive simulation data are presented. FinFET shows the highest transconductances corresponding to aforementioned highest IDLIN and IDSAT. Regarding process variation, same W¬Si/D [...]

Variability Study for Silicon Nanowire FETs

Liao Y.-B., Chiang M-H, Kim K., Hsu W.-C., National Cheng Kung University, TW
3-D numerical simulation shows that both the conventional and JL nanowire FETs are sensitive to structural variation whereas the former is more tolerable. Due to more increased Ion/Ioff for lower D and WSi in JL, [...]

A Physics-Based Compact Model for Nano-Scale DG and FD/SOI MOSFETs

Fossum J., Ge L., Chiang M-H, University of Florida, US
A process/physics-based compact model (UFDG) for double-gate (DG) MOSFETs is overviewed. The model, in essence, is a compact Poisson-Schrödinger solver, including accountings for short-channel effects, and is applicable to nano-scale fully depleted (FD) SOI MOSFETs [...]

Double-Gate CMOS Evaluation for 45nm Technology Node

Chiang M-H, An J.X., Krivokapic Z., Yu B., AMD, US
Interest in the double-gate (DG) MOSFET has been growing as transistor development is approaching the end of SIA roadmap. Recent progress in DG technology, and some theoretical study have promoted DG to one of the [...]

A Physics-Based Compact Model for Nano-Scale DG and FD/SOI MOSFETs

Fossum J., Ge L., Chiang M-H, University of Florida, US
A process/physics-based compact model (UFDG) for double-gate (DG) MOSFETs is overviewed. The model, in essence, is a compact Poisson-Schrödinger solver, including accountings for short-channel effects, and is applicable to nano-scale fully depleted (FD) SOI MOSFETs [...]

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