Flexible virtual source compact model for fast modeling of new channel materials and device architectures


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The end of bulk silicon-based transistor technology has often been predicted in the scientific and technical literature. As a result, many new channel materials (such as III-V semiconductors, 2D materials, nanowires and -tubes) and device concepts (such as FINFETs, nanosheets, lateral or vertical nanowires and -tubes) have been explored and suggested to replace silicon-based MOSFETs. However, for evaluating the pros and cons of these large number of alternatives in applications (i.e. circuits) under realistic conditions, comparisons at the circuit level are needed. Therefore, a simple and versatile compact model is needed that also provides an intuitive understanding of the role of its material and device structure related parameters. The model should have an as low as possible number of parameters to facilitate an easy and quick parameter extraction since most of these new technologies are not mature and often characteristics of only a single fabricated device are available that do not allow the extraction of parameter for sophisticated compact models like BSIM. These modeling challenges are addressed by the extended Virtual Source (X-VS) compact model presented in this paper. The X-VS model is based on the Virtual Source compact model but augments it with new material and structure related formulations, that enable its application to a diverse set of process technologies. The channel material may consist of either a bulk semiconductor or a certain number of tubes or wires per width, considering also electrostatic interaction (screeing effects) between tubes or wires for small pitches. Different device architectures are being handled by the availiability of the corresponding formulations for the oxide capacitance. Moreover, the influence of the channel length on the transport mode (ballistic or diffusive) is included by calculating characteristic channel properties such as the apparent mobility and the carrier velocity. In the ballistic regime the implemented model equations can intrinsically limit the output conductance and transconductance to the theoretical maximum values expected for the transistor operating in the quantum capacitance limit region. Additionally, metallic carbon nanotubes, channel-length modulation and mobility degradation effects are included in the extended compact model. The new X-VS model has been applied to both experimental and TCAD generated data of a variety of device structures with different channel materials. Good agreement with measurements of a 120nm channel length bulk Si-MOSFETs has been obtained for both drain current, transconductance and transit frequency. The description of the transconductance behavior for carbon nanotube FETs still needs some improvement. The comparison to measurements of a 200nm InGaAs nanowire FET exhibits excellent agreement. Additional devices with smaller channel lengths and from different technologies with carrier transport ranging from ballistic to diffusive have been modeled. The results and extended model formulations will be presented in the final paper. In all cases, after adding capacitive and resistive parasitics from the metalization, at least satisfactory agreement has been obtained using the same compact model framework. This enables the exploration of device and circuit performance under realistic conditions and a fair technology comparison.

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Journal: TechConnect Briefs
Volume: 4, Informatics, Electronics and Microsystems: TechConnect Briefs 2018
Published: May 13, 2018
Pages: 244 - 248
Industry sector: Sensors, MEMS, Electronics
Topic: WCM - Compact Modeling
ISBN: 978-0-9988782-1-8