Papers – Page 3 – TechConnect Briefs

Capacitance Model for Four-Terminal DG MOSFETs

Nakagawa T., Sekigawa T., Tsutsumi T., Hioki M., O’uchi S., Koike H., National Institute of Advanced Industrial Science and Technology, JP

We present an intrinsic-capacitance model for undoped-channel full-deplete DG MOSFETs with two independent gates of different gate-oxide thickness. It includes carrier-velocity saturation, and mobility change by the surface electric-field. We considered five intrinsic capacitances Cg1s, [...]

Explicit Threshold Voltage Based Compact Model of Independent Double Gate MOSFET

Reyboz M., Poiroux T., Rozeau O., Martin P., Jomaah J., CEA, FR

This paper describes an explicit compact model of Independent Double Gate (IDG) MOSFET with undoped channel. The validity of this model is demonstrated by comparisons with Atlas simulations. The model was implemented in VerilogA in [...]

Compact Modeling of Doped Symmetric DG MOSFETs with Regional Approach

Chandrasekaran K., Zhu Z.M., Zhou X., Shangguan W., See G.H., Chiah S.B., Rustagi S.C., Singh N., Nanyang Technological University, SG

A compact model for the explicit surface potential equation of doped symmetric double-gate MOSFET from Poisson equation with regional approach is presented. It’s scalable for all doping and channel thicknesses and has been proved to [...]

A Carrier Based Analytic Model for Undoped Surrounding-Gate MOSFETs

He J., Zhang X., Chan M., Wang Y., Peking University, CN

A carrier-based analytic DCIV model for the undoped cylindrical surrounding-gate MOSFETs is presented in this paper. It is based on an exact solution of the Poisson equation and a Pao-Sah current formulation in terms of [...]

Compact Capacitance Model of LDMOS for Circuit Simulation

Ma J., Ma Y., Chen P., Liang H., Ma J., Ma Y., Jeng M-C, Liu Z., Cadence Design Systems, Inc., US

Capacitance modeling in LDMOS is much more complicated than that in bulk MOSFET’s due to the fact of non-uniform lateral channel doping, the extended gate drain overlap region and its interaction with channel charges. Measurements [...]

Analysis and Modeling of NQS Effects in MOSFET’s

Ma Y., Jeng M-C, Liang H., Liu Z., Cadence Design Systems, Inc., US

Three issues regarding NQS effect in MOSFET’s are investigated: When NQS effect becomes significant, NQS effect on channel charge partition, and its implementation in advanced MOSFET models (PSP, Hisim2 and Bsim4).Channel segmentation method [1] with [...]

TCAD-based Process Dependant HSPICE Model Parameter Extraction

Mahotin Y., Tirumala S., Lin X-W, Pramanik D., Synopsys, Inc., US

This paper describes the methodology for global extraction of HSPICE compact model parameters as explicit polynomial functions of process parameter variations (halo dosage, gate oxidation temperature etc). Electrical data required for extraction is obtained from [...]

Month: May 2006