BSIM Model for MOSFET Flicker Noise Statistics: Technology Scaling, Area, and Bias Dependence

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We have implemented a statistical model for MOSFET flicker noise as an extension to BSIM. Model development methodology and hardware correlation for various types of MOSFETs from 180nm and 130nm technology nodes are presented. Given that many analog/mixed-signal and RF circuits are sensitive to flicker noise, it is essential to utilize a quantitative approach to design optimization that accounts for noise variation. The new model enables users to accurately predict the impact of flicker noise variations on design performance. We have previously shown the model correlation to a sample of standard nFETs and pFETs from a 180nm RFCMOS technology. In this paper, we build on our previous work in two respects. First, the present work addresses noise variation of MOSFETs of various types illustrating the influence of different FET characteristics on 1/f noise variation. Comparisons are made between 130nm MOSFETs (standard, thick oxide, low-Vt, high-Vt) as well as between 180nm and 130nm MOSFETs. Second, the increase in the noise variation as transistor area is reduced and as gate overdrive is decreased is addressed in detail and implemented in the new model. The present work sheds light on the physical mechanisms leading to flicker noise variation; the noise variation is largely attributed to stochastic fluctuations in effective trap density of the devices.

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Journal: TechConnect Briefs
Volume: 3, Technical Proceedings of the 2006 NSTI Nanotechnology Conference and Trade Show, Volume 3
Published: May 7, 2006
Pages: 768 - 771
Industry sector: Sensors, MEMS, Electronics
Topic: Compact Modeling
ISBN: 0-9767985-8-1