Papers – Page 4 – TechConnect Briefs

Comprehensive Characterization and Analysis of RTS, 1/f, RF Noise and Power Performances of Schottky-Diode in Standard CMOS

Xiong Y.Z., Lo G.Q., Loh W.Y., Shi J.L., Yu M.B., Loh W.Y., Kwong D.L., Institute of Microelectronics, Singapore, SG

This study presents comprehensive characterization of Schottky-diode in standard CMOS on its DC, low-frequency and RF noise performance. Random-telegraph-signal (RTS) and 1/f noise have been characterized, along with RF noise, power performances analysis. Results showed [...]

On the Compact Modelling of Induced Gate Noise in the MOS Transistor

Roy A.S., Enz C.C., Swiss Federal Institute of Technology, Lausanne (EPFL), CH

This work presents a analytical model to calculate gate related noise parameters for any arbitrary velocity field relationship and discusses some finer point of diffusivity modeling and impact of those effect on gate related noise [...]

Compact Modeling of Nonlinearities in Submicron MOSFETs

da Silva P.D., de Sousa F.R., Schneider M.C., Montoro C.G., Schneider M.C., Federal University of Santa Catarina, BR

Low power operation in RF CMOS circuits requiring low-distortion levels is often difficult to achieve due to the exponential relationship between drain current (IDS) and gate-to-source voltage (VGS) in subthreshold region. Our contribution in this work [...]

Scalable MOSFET Short-channel Charge Model in All Regions

See G.H., Chiah S.B., Zhou X., Chandrasekaran K., Shangguan W., Zhu Z., Lim G.H., Pandey S.M., Cheng M., Chu S., Hsia L.-C., NTU, SG

Short-channel effects (SCEs) for both intrinsic chargesand extrinsic capacitances need to be modeled when theMOSFET channel is short. The intrinsic SCEs are modeled using bulk-charge sharing and quasi-two dimensional potential barrier loweirng; extrinsic overlap capacitances [...]

DC and AC Symmetry Tests for MOSFET Models

McAndrew C.C., Freescale Semiconductor, US

Symmetry around Vds=0 is a critical requirement forMOSFET models, e.g. as it affects the ability of a model tosimulate accurately distortion for some RF CMOS mixers.The Gummel Symmetry Test is, until now, the standardtest used [...]

Compact Modeling of Short Channel Double-Gate MOSFETs

Lu H., Liang X., Wang W., Taur Y., Univ. California, San Diego, US

This talk presents analytical modeling of short-channel effect in double-gate MOSFETs. 2-D Poisson’s eq. is solved as a boundary value problem in subthreshold. 2-D potential distribution and subthreshold currents have been calculated and verified by [...]

Charge-storage calculation for Si-based bipolar transistors from device simulation

Tran H., UCSD, US

Various methods for calculating regional charge storage components in bipolar transistors fromdevice simulation results are compared with respect to their usefulness for compact modeling. Themethods are evaluated for Si and SiGe transistors with very different [...]

Month: May 2006

Comprehensive Characterization and Analysis of RTS, 1/f, RF Noise and Power Performances of Schottky-Diode in Standard CMOS

On the Compact Modelling of Induced Gate Noise in the MOS Transistor

Compact Modeling of Nonlinearities in Submicron MOSFETs

DC and AC Symmetry Tests for MOSFET Models

Compact Modeling of Short Channel Double-Gate MOSFETs

Charge-storage calculation for Si-based bipolar transistors from device simulation

Development and Design Kit Integration of a Scalable and Statistical High Current Model for Advanced SiGe HBTs

Compact Modeling of Spiral Inductors for RF Applications

Analog Compact Modeling for a 20-120V HV CMOS Technology