Compact Modeling

Non-Charge-Sheet Analytic Model for Ideal Retrograde Doping MOSFETs

Zhou X., Zhou Z., Zhang J., Zhou X., Zhou Z., Lin X., He J., Peking University, CN

This paper presents a physics-based non-charge-sheet analytic model for an ideal retrograde doping MOSFET structure. The model adopts an approach of solving Poisson’s equation for the heavily-doped region and lightly-doped region, respectively, and the analytic [...]

Theory of Bipolar MOSFET (BiFET) with Electrically Short Channels

Jie B.B., Sah C-T, Univesity of Florida, US

Bipolar MOSFETs with a pure base and two MOS gates usually have electrically short channels compared with its intrinsic Debye length of about 25μm at room temperatures. This short channel effect was missed by all [...]

Si-Based Process Aware SPICE Models for Statistical Circuit Analysis

Krishnamurthy S., Dasarapu V.K., Mahotin Y., Ryles R., Roger F., Uppal S., Mukherjee P., Cuthbertson A., Lin X-W, Synopsys, Inc., US

This paper describes methodology for constructing compact SPICE models as a function of process parameter variations. The methodology involves global extraction of process-dependant SPICE model parametersfrom silicon data. The robustness of this methodology was tested [...]

HiSIM-HV: a complete surface-potential-based MOSFET model for High Voltage Applications

Oritsuki Y., Yokomiti M., Sakuda T., Sadachika N., Miyake M., Kajiwara T., Feldmann U., Mattausch H.J., Miura-Mattausch M., Miura-Mattausch M., Hiroshima University, JP

We present here the high-voltage MOSFET model HiSIM-HV based on the complete surface-potential description. The model is valid both for symmetrical and asymmetrical structures with scaling properties for any structural variations valid for wide range [...]

Impact of Non-Uniformly Doped and Multilayered Asymmetric Gate Stack Design on Device Characteristics of Surrounding Gate MOSFETs

Kaur H., Kabra S., Haldar S., Gupta R.S., University of Delhi, IN

In the present work, a new structural concept, non-uniformly doped multilayered asymmetric gate stack (ND-MAG) surrounding gate MOSFET has been proposed and it has been demonstrated using analytical modeling and simulation that ND-MAG SGT leads [...]

A Technique for Constructing RTS Noise Model Based on Statistical Analysis

Wei C.Q., Xiong Y.Z., Zhou X., Nanyang Technological University, SG

In this paper, a technique for constructing the RTS noise model based on the statistical analysis of the noise data obtained from the Schottky diode under different biases is introduced. The three RTS parameters: pulse [...]

Physical Carrier Mobility in Compact Model of Independent Double Gate MOSFET

Reyboz M., Martin P., Rozeau O., Poiroux T., CEA-LETI, FR

We have already developed an explicit threshold voltage based compact model of independent double gate MOSFET which well works for gate length between 30 nm and 1µm, or more. However, the mobility was assumed constant. [...]

Compact Model of the Ballistic Subthreshold Current in Independent Double-Gate MOSFETs

Munteanu D., Moreau M., Autran J-L, L2MP-CNRS, FR

Double-Gate structures with independent gates have been recently proposed, allowing a four terminal operation. Independent Double-Gate (IDG) MOSFETs offer additional potentialities, such as a dynamic threshold voltage control by one of the two gates, transconductance [...]

Compact Analytical Threshold Voltage Model for Nanoscale Multi-Layered-Gate Electrode Workfunction Engineered Recessed Channel (MLGEWE-RC) MOSFET

Chaujar R., Kaur R., Saxena M., Gupta M., Gupta R.S., Gupta M., Gupta R.S., University of Delhi, IN

In this paper, compact analytical threshold voltage model for multi-layered-gate electrode workfunction engineered recessed channel (MLGEWE-RC) MOSFET is presented and investigated using ATLAS device simulator. The novel device continues merits of recessed channel and dual [...]