SOI-MOSFET – TechConnect Briefs

A Charge Based Non-Quasi-Static Transient Model for SOI MOSFETs

Zhang J., He H., He J., Ye Y., He H., He J., Chan M., Peking University, CN

A non-quasi-static (NQS) transient model for SOI MOSFETs is presented based on charge based dc model which is extensively verified with various structure parameters. From the inversion charge and current-continuity equation, the partial differential equation [...]

HiSIM-SOTB: A Compact Model for SOI-MOSFET with Ultra-Thin Si-Layer and BOX

Miura-Mattausch M., Kikuchihara H., Feldmann U., Nakagawa T., Miyake M., Iizuka T., Mattausch H.J., Miura-Mattausch M., Hiroshima University, JP

The Silicon-On-Thin-Buried-Oxide (SOTB) transistor is a descendant of the conventional SOI MOSFET with thin Silicon and BOX layers. Many different structure and material variations are possible, where the choice of a thicker BOX may be [...]

Modeling of Chain History Effect based on HiSIM-SOI

Fukunaga Y., Miyake M., Toda A., Kikuchihara K., Baba S., Feldmann U., Mattausch H.J., Miura-Mattausch M., Miura-Mattausch M., Hiroshima University, JP

SOI-MOSFET is considered as a candidate for the next MOSFET generations with advanced technology due to its suppression of the short-channel effect and its high driving capability. However, it is known that the history effect [...]

Complete Surface-Potential Modeling Approach Implemented in the HiSIM Compact Model Family for Any MOSFET Type

Miura-Mattausch M., Miyake M., Kikuchihara H., Feldmann U., Amakawa S., Mattausch H.J., Miura-Mattausch M., Hiroshima University, JP

Many possible future device structures are investigated in parallel to obtain highest performance features. It has been shown that an SOI-MOSFET with a thin body enables both high device performances and suppression of statistical variations. [...]

A Unified Charge-Based Model for SOI MOSFETs Valid from Intrinsic to Heavily Doped Channel

Zhang J., Zhang L., He J., Zhang J., Zhang L., Zhou X., Zhou Z., Zhou X., Zhou Z., Peking University, CN

A unified charge-based model for SOI MOSFETs is presented. The proposed model is valid and accurate from intrinsic to heavily doped channel with various structure parameter variations. The framework starts from one-dimension Poisson-Boltzmann’s equation. Based [...]

HiSIM-SOI: SOI-MOSFET Model for Circuit Simulation Valid also for Device Optimization

Sadachika N., Kusu S., Ishimura K., Murakami T., Kajiwara T., Hayashi T., Nishikawa Y., Yoshida T., Miura-Mattausch M., Hiroshima University, JP

SOI-MOSFETs are considered to be suitable for high performance as well as low power applications and its developments are tend to go toward the thinner SOI films to enhance the device characteristics. Thus compact models [...]

Tunnel Field Effect Transistor (TFET) with Strained Silicon Thinfilm Body for Enhanced Drain Current and Pragmatic Threshold Voltage

Kumar M.J., Saurabh S., Indian Institute of Technology, IN

Quantum tunneling devices are very promising as they have very low leakage current and show good scalability. However, the most serious drawback for tunneling devices hampering their wide-scale CMOS application is their low on-current and [...]

A New Grounded Lamination Gate (GLG) SOI MOSFET for Diminished Fringe Capacitance Effects

Kumar M.J., Venkataraman V., Gupta S.K., Indian Institute of Technology, IN

In this paper, we propose a novel device structure, known as the Grounded Laminated Gate (GLG) SOI MOSFET to eliminate the gate fringe field effects on the threshold voltage of short channel SOI MOSFETs. Our [...]

The Surface-Potential-Based model HiSIM-SOI and its Application to 1/f Noise in Fully-Depleted SOI-MOSFETs

Sadachika N., Yusoff M.Md., Uetsuji Y., Bhuyan M.H., Kitamaru D., Mattausch H.J., Miura-Mattausch M., Miura-Mattausch M., Weiss L., Feldmann U., Baba S., Graduate School of Advanced Sciences of Matter, Hiroshima University, JP

Fully-depleted SOI-MOSFET model HiSIM-SOI for circuit simulation is developed. HiSIM-SOI solves surface potentials at all three SOI-surfaces along the depth direction self-consistently. Besides comparison to measured I-V characteristics, the model is verified with 1/f noise [...]

Full-band Particle-based Simulation of Germanium-On-Insulator FETs

Beysserie S., Branlard J., Aboud S., Goodnick S.M., Thornton T., Saraniti M., Illinois Institute of Technology, US

We model and simulate novel fully depleted (FD) sub-50nm gate lengths MOSFET structures using a full-band particle simulator based on the Cellular Monte Carlo (CMC) method that provides an accurate transport model at the high [...]