He J. – TechConnect Briefs

Improved Electric Field Decomposition Capacitance Model with 3-D Terminal and Fringe Components in Sub-28nm Interconnect

Zhang A., Li C., Liu J., He J., He X., He Y., Liu J., He J., He X., He Y., Ma G., Pan J., He J., He X., He Y., Hu G., Peking University Shenzhen Institute and PKU-HKUST Shenzhen-Hong Kong Institution, CN

In this paper, a parasitic capacitance model for a finite single three-dimensional (3-D) wire above an infinite plate in the nano-scale 3-D integrated circuit application is developed based on electric field decomposition (EFD). The capacitance [...]

Numerical Method to Simulate GFET Terahertz Wave Detection

Ma X., He J., He X., Li C., He J., He X., Jun P., Hu G., Ren Y., Wang X., SoC Key Laboratory, Peking University Shenzhen Institute and PKU-HKUST Shenzhen-Hong Kong Institution, CN

A numerical method to simulate THz wave generation and detection of the graphene base field effect transistor (GFET) is developed in this paper. It is derived directly from the hydrodynamic equations and implemented in Matlab [...]

Graphene Based Field Effect Transistor Analog/RF Performance Analysis from Non-equilibrium Green’s Function Simulation

Chen Y., He J., He X., Li C., Liu J., He J., He X., Jun P., Hu G., Liu J., Ren Y., Ma X., SoC Key Laboratory, Peking University Shenzhen Institute and PKU-HKUST Shenzhen-Hong Kong Institution, CN

Based on the non-equilibrium Green’s function simulation, the Graphene Field Effect Transistor (GFET) analog/RF performance including the trans-conductance efficiency gm/Id, cutoff frequency ft, and maximum oscillation frequency fmax are analyzed in details. The analysis method [...]

Surface Potential Based Compact I-V Model for GaN HEMT Devices

Chang C., He J., He X., He Y., Li C., Liu J., He J., He X., He Y., Liu J., He J., He X., He Y., Pan J., Hu G., Ren Y., SoC Key Laboratory, Peking University Shenzhen Institute and PKU-HKUST Shenzhen-Hong Kong Institution, CN

Gallium Nitride (GaN)-based high electron mobility transistors (HEMTs) are emerging as promising contenders to replace existing Silicon and Gallium Arsenide (GaAs) devices in the radio-frequency/microwave power amplifiers and high-power switching applications. Along with the fast [...]

Hot Carrier Effect and Oxide Reliability of T-FinFET Devices

He J., He X., He Y., Hu G., Li C., Liu J., He J., He X., He Y., Liu J., Ma G., He J., He X., He Y., Pan J., SoC Key Laboratory, Peking University Shenzhen Institute and PKU-HKUST Shenzhen-Hong Kong Institution, CN

Hot-carrier effect and oxide reliability of CMOS T-FinFET with 2.1nm-thick gate-SiO2 were investigated. It was found that hot-carrier immunity improves as the T-FinFET fin width (body thickness) decreases, which facilitates gate-length scaling, while it is [...]

An Effective Mobility Model for Tunneling Double-Gate MOSFET (T-FinFET)

He J., He X., Pan J., Liu J., Li C., Liu J., Hu G., Ma G., He J., He X., Chan M., SoC Key Laboratory, Peking University Shenzhen Institute and PKU-HKUST Shenzhen-Hong Kong Institution, CN

We have derived an analytical model for the effective field (Eeff) model of undoped Ultra-Thin Body (UTB) Double Gate (DG) SOI Tunneling MOSFETs ( T-FinFET) from the solution of the Poisson’s equation in this paper [...]

A Neural Network Method to Model Nanoscale FinFET Performance

He J., Peking University Shenzhen SoC Key Lab., CN

This paper presents a neural network method to model nanometer FinFET performance. The principle of this method is firstly introduced and its application in modeling DC and conductance characteristics of nanoscale FinFET transistor is demonstrated [...]

Development and Performance of Recyclable Composites for Wind Turbine Blades

Ma Y., Kim D., Wu M-S, Bai L., Gao X., Qing B., He J., Lib X., Nutt S.R., Liang B., Adesso Advanced Materials Inc., US

Wind energy has become an increasingly important renewable energy source. In 2015 alone, the U.S. wind industry installed wind turbines generating 8,595 MW, a 77 % increase over 2014 [1], and the market growth is [...]

Mobility Enhancement from Process-Induced Stress of T-FinFET and Compact Model Development

He J., Peking University Shenzhen SoC Key Lab., CN

It is an often measure that the process-induced stress has been used in advanced CMOS process platform to increase the carrier mobility so to enhance MOSFET performance. It has also a strong effect on the [...]

A New Method to Fin-width Line Edge Roughness Effect Simulation of FinFET Performance

Zhu Y., Zhao W., Wang W., Wu W., Feng Z., He J., He P., He J., He P., Song L., Peking University Shenzhen SOC Key Laboratory, CN

This paper developed a full three-dimensional (3-D) statistical simulation method to investigate Fin-width Line Edge Roughness (LER) effect on the FinFETs performance. The line edge roughness is introduced by Matlab program, and then the intrinsic [...]