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HomeSectorsAdvanced Materials & Manufacturing

Sector: Advanced Materials & Manufacturing

Poster Papers

Statistical Simulations of Oxide Leakage Current in MOS Transistor and Floating Gate Memories

Larcher L., Pavan P., Università di Modena e Reggio Emilia, IT
The purpose of this paper is to illustrate a physically-based model allowing the statistical simulations of oxide leakage currents in MOS transistors and Floating Gate memories. This model computes the leakage current through defects randomly [...]

Compact Modeling of Four-Terminal Junction Field-Effect Transistors

Liou J., University of Central Florida, US
This paper presents a physics -based compact model for a four terminal (independent top and bottom gates) junction field-effect transistor (JFET). The model describes the JFET’s dc and ac characteristics with a high degree of [...]

Physics and Modeling of Noise in SiGe HBT Devices and Circuits

Niu G., Auburn University, US
This paper gives an overview of the physics and modeling of noise in SiGe HBT devices and circuits, including RF broadband noise, low-frequency noise, and oscillator phase noise. The ability to simultaneously achieve high cutoö [...]

Two-/Three-Dimensional GICCR for Si/SiGe Bipolar Transistors

Tran H., University of Technology Dresden, DE
This paper presents the derivation of a two- and threedimensional (2D/3D) generalized Integral-Charge Control Relation (GICCR) that is based on an exact physical relation for the transfer current of bipolar transistors. The resulting compact equation [...]

Compact Modelling of High-Voltage LDMOS Devices

Aarts A.C.T., van der Hout R., van Langevelde R., van der Hout R., van Langevelde R., Scholten A.J., Willemsen M.B., Klaassen D.B.M., Philips Research Laboratories, NE
In this paper various modelling approaches for Laterally Double-Di used MOS (LDMOS) devices are discussed. Characterisation results for the new compact LDMOS model called MOS Model 20 are presented. Measurements of the dc-current, its conductances [...]

Modeling FET Variation Within a Chip as a Function of Circuit Design and Layout Choices

Watts J., Lu N., Bittner C., Grundon S., Oppold J., IBM, US
In addition to the overall range of circuit characteristics expected from process variation the circuit designer needs to know how closely different circuit element will track one another. We describe a new methodology for modeling [...]

A Study of Figures of Merit for the High Frequency Behavior of MOSFETs in RF IC Applications

Cheng Y., Siliconlinx, US
This paper is to review important device parameters as the figures of merit (FOM) to understand the device characteristics for analog/RF applications. These FOM should be characterized and evaluated in technology development and model generation [...]

Challenges in Compact Modeling for RF and Microwave Applications

Niknejad A., Dunga M., Heydari B., Wan H., Lin C.H., Emami S., Doan C., Xi X., He J., Heydari B., Hu C., University of California at Berkeley, US
Commercial CMOS chips routinely operate at frequencies up to 5 GHz and exciting new opportunities exists in higher frequency bands such as 3-10 GHz, 17 GHz, 24 GHz, and 60 GHz. Many research groups have [...]

RF-MOSFET Model Parameter Extraction with HiSIM

Miura-Mattausch M., Sadachika N., Murakawa M., Mimura S., Higuchi T., Itoh K., Inagaki R., Iguchi Y., Hiroshima University, JP
This paper discusses a feasibility of an automatic parameter extraction method with the GA (Genetic Algorithm) for surface-potential-based MOSFET model HiSIM (Hiroshima-university STARC IGFET Model), where all device characteristics are described as functions of the [...]

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