Papers:
Verilog-AMS Eases Mixed Mode Signal Simulation
The ability to design and verify mixed mode (digital, analog, electrical, and non-electrical) systems is key to the development of new products for the ever expanding electromechanical market. Although there are several individual point tools [...]
A Novel Method for the De-Embedding of S-Parameters of Double Heterojunction d-doped PHEMTs – Modeling and Measurements
Rao R.V.V.V.J., Joe J., Chia Y.W.M., Ang K.S., Wang H., Ng G.I., National University of Singapore, SG
A simple and accurate method for extracting small-signal signal equivalent circuit for double heterojunction d-doped PHEMTs was developed. The circuit elements were extracted from the S-parameters of PHEMTs. Parasitic inductances Lg, Ld and Ls were [...]
Modeling of On-Chip Simultaneous Swithcing Noise in VDSM CMOS Circuits
On-chip simultaneous switching noise (SSN) has become an important issue in the design of power distribution networks in current VLSI/ULSI circuits. An analytical expression characterizing the simultaneous switching noise voltage is presented here based on [...]
Modeling of Threshold Voltage with Reverse Short Channel Effect
This paper presents a new reverse short channel effect (RSCE) model for threshold voltage modeling of submicrometer MOSFETs. Unlike those conventional empirically-based RSCE models, the proposed model is derived and simplified based on two Gaussian [...]
Behavioral Models and Specific Design Tool for New Power Integrated Devices
The developments of power systems require the use of specific functions offering a higher performance while being more compact and more reliable than existing discrete functions. To facilitate the design of these new functions,based on [...]
Improved Prediction of Length/Temperature-Dependent Impact Ionization Induced Body Current Based on an Accurate Saturation Drain Voltage Model
The length/temperature-dependent body current IB in deep submicron LDD pMOSFETs is investigated, based on an improved saturation drain voltage (VSDsat) extraction algorithm and model. The accuracy of VSDsat is shown to have a direct influence [...]
Analytical Results for the Current-Voltage Characteristics of an SOI-MOSFET
Exact formulae for the current-voltage characteristics of an SOI/SOS MOSFET operating in the fully depleted mode are derived by extending the asymptotic method of Ward [1,2]. A detailed comparison with test data is presented and [...]
A Novel Approach to Compact I-V Modeling for Deep-Submicron MOSFET’s Technology Development and Circuit Simulation
This paper presents a novel approach to formulating compact I-V models for deep-submicron MOS technology development. The developed model is a one-region closed-form equation that resembles the same form as the long-channel one, which covers [...]
Automatic Generation of Equivalent Circuits from Device Simulation
We present a novel methodology for the direct extraction of equivalent circuit models from device simulation. The circuit topology is physically based, i.e., each voltage node corresponds to a quasi-Fermi level or to an electrostatic [...]
Genetic Algorithm Based MOSFET Model Parameter Extraction
The Levenberg-Marquardt (LM) minimization algorithm commonly employed in MOSFET model parameter extraction has several known deficiencies, such as poor convergence characteristics without a good initial guess, low likelihood of convergence to the globally optimal solution, [...]
A New Continuous Model for Deep Submicron MOSFETs
Chan K-M.S., Wong N-C.A., Wong S-C., Chao C-J., Kao D-B., Wong N-C.A., Wong S-C., Yang C.Y., Winbond Electronics Corporation America, US
A 1-D model is developed to account for mobile charges in the Source/Drain junction regions of a MOSFET. 2-D effects such as Threshold Roll-off and Drain Induced Barrier Lowering are accounted for with an empirical [...]
Mobility Degradation and Current Loss Due to Vertical Electric Field in Channel Area of Submicron MOS Devices
In this work we show quantified modeling results for the effect of gate-voltage-induced mobility degradation on MOS device current. Presented results are for three technologies, i.e. 0.50 mm, 0.35mm, and 0.25mm, and are based on [...]
Journal: TechConnect Briefs
Volume: Technical Proceedings of the 2000 International Conference on Modeling and Simulation of Microsystems
Published: March 27, 2000
Industry sector: Sensors, MEMS, Electronics
Topics: Compact Modeling, Nanoelectronics
ISBN: 0-9666135-7-0