Miura-Mattausch M. – Page 2 – TechConnect Briefs

Compact Model HiSIM-DG both for Symmetrical and Asymmetrical DG-MOSFET Structures

Ishimura K., Sadachika N., Kusu S., Miura-Mattausch M., Hiroshima University, JP

In this work, the circuit simulation model for DG-MOSFET named HiSIM-DG, has been developed based on the complete surface-potential-based description. The model solves the Poisson equation to the vertical direction iteratively in quasi-2 dimensions including [...]

HiSIM-SOI: SOI-MOSFET Model for Circuit Simulation Valid also for Device Optimization

Sadachika N., Kusu S., Ishimura K., Murakami T., Kajiwara T., Hayashi T., Nishikawa Y., Yoshida T., Miura-Mattausch M., Hiroshima University, JP

SOI-MOSFETs are considered to be suitable for high performance as well as low power applications and its developments are tend to go toward the thinner SOI films to enhance the device characteristics. Thus compact models [...]

HiSIM-HV: a complete surface-potential-based MOSFET model for High Voltage Applications

Oritsuki Y., Yokomiti M., Sakuda T., Sadachika N., Miyake M., Kajiwara T., Feldmann U., Mattausch H.J., Miura-Mattausch M., Miura-Mattausch M., Hiroshima University, JP

We present here the high-voltage MOSFET model HiSIM-HV based on the complete surface-potential description. The model is valid both for symmetrical and asymmetrical structures with scaling properties for any structural variations valid for wide range [...]

Modeling of Floating-Body Devices Based on Complete Potential Description

Sadachika N., Murakami T., Ando M., Ishimura K., Ohyama K., Miyake M., Mattausch H.J., Miura-Mattausch M., Miura-Mattausch M., Hiroshima University, JP

Advanced MOSFETs exploit the carrier confinement to suppress the short-channel effect, which is realized by reducing the bulk layer thickness. The ongoing developments of the multi-gate MOSFET as well as the fully-depleted SOI-MOSFET with ultra [...]

Construction of a Compact Modeling Platform and Its Application to the Development of Multi-Gate MOSFET Models for Circuit Simulation

Miura-Mattausch M., Chan M., He J., Koike H., Mattausch H.J., Miura-Mattausch M., Nakagawa T., Park Y.J., Tsutsumi T., Yu Z., Hiroshima University, JP

We are reporting the construction of a common platform for compact model development based on the Verilog-A language and in particular a framework for efficient development of multi-gate MOSFET models for circuit simulation. Phenomena expected [...]

HiSIM-Varactor: Complete Surface-Potential-Based Model for RF Applications

Miyake M., Sadachika N., Matsumoto K., Navarro D., Ezaki T., Miura-Mattausch M., Mattausch H.J., Miura-Mattausch M., Ohguro T., Iizuka T., Taguchi M., Miyamoto S., Hiroshima University, JP

For RF-circuit analysis, an accurate compact model for the MOS varactor is urgently desired. We have developed such an accurate MOS varactor model HiSIM-Varactor based on the surface-potential MOSFET model HiSIM. HiSIM-Varactor includes the majority [...]

HiSIM2.4.0: Advanced MOSFET model for the 45nm Technology Node and Beyond

Miura-Mattausch M., Sadachika N., Miyake M., Navarro D., Ezaki T., Mattausch H.J., Miura-Mattausch M., Ohguro T., Iizuka T., Taguchi M., Miyamoto S., Inagaki R., Furui Y., Hiroshima University, JP

HiSIM realizes both accurate and fast circuit simulation. The newly developed HiSIM2.4.0 includes required features in modeling for the 45nm technology node and beyond such as the STI stress effect. A major development is an [...]

Advanced Compact MOSFET Model HiSIM2 Based on Surface Potentials with a Minimum Number of Approximation

Miura-Mattausch M., Navarro D., Sadachika N., Suzuki G., Takeda Y., Miyake M., Warabino T., Machida K., Ezaki T., Mattausch H.J., Miura-Mattausch M., Ohguro T., Iizuka T., Taguchi M., Kumashiro S., Inagaki R., Miyamoto S., Hiroshima University, JP

The compact model HiSIM2 supports RF-circuit applications with advanced MOSFETs and is a further development of HiSIM1 which has been released since 2001 for public usage. Important features, required for the real applications, are summarized. [...]

HiSIM: Accurate Charge Modeling Important for RF Era

Miura-Mattausch M., Navarro D., Ueno H., Mattausch H.J., Miura-Mattausch M., Morikawa K., Itoh S., Kobayashi A., Masuda H., Hiroshima University, JP

Extension of the gradual-channel approximation is presented with the surface-potential-based MOSFET modeling. All phenomena observed under the saturation condition are described by the potential increase in the pinch-off region in a self-consistent way. The charge [...]

Noise Modeling with HiSIM Based on Self-Consistent Surface-Potential Description

Miura-Mattausch M., Hosokawa S., Navarro D., Matsumoto S., Ueno H., Mattausch H.J., Miura-Mattausch M., Ohguro T., Iizuka T., Taguchi M., Kage T., Miyamoto S., Hiroshima University, JP

Accurate prediction of noise characteristics is a prerequisite for RF-circuit simulation. We demonstrate here that the 1/f noise is modeled only with the trap density as a model parameter and the thermal drain noise is [...]