In this work, the circuit simulation model for DG-MOSFET named HiSIM-DG, has been developed based on the complete surface-potential-based description. The model solves the Poisson equation to the vertical direction iteratively in quasi-2 dimensions including the bulk impurity concentration explicitly, verifying the influence of the bulk impurity concentration. The dependence of circuit performances on the impurity concentration have been investigated with the model, showing the fact that the inclusion of the impurity concentration is important for high doped DG-MOSFET. The model is extended to include the asymmetrical DG-MOSFETs, which have been demonstrated to provide better device performance enabling enhanced subthreshold characteristics and thus a compact model for asymmetrical structure for various bias conditions is highly requested. The extended HiSIM-DG valid both for the symmetrical and asymmetrical cases have been verified, showing that the sub-gate bias controls the inversion condition of the main gate surface potential, enabling subthreshold shift. These features of the asymmetrical DG-MOSFET structure are well captures by HiSIM-DG.
Journal: TechConnect Briefs
Volume: 3, Nanotechnology 2009: Biofuels, Renewable Energy, Coatings, Fluidics and Compact Modeling
Published: May 3, 2009
Pages: 584 - 587
Industry sector: Sensors, MEMS, Electronics
Topics: WCM - Compact Modeling