MOSFET – Page 8 – TechConnect Briefs

Accurate Modeling for RF Silicon MOSFET up to 15 GHz and the Parameter Extraction Methodology

Lin J., Kiat Seng Y., Jian Guo M., Manh Anh D., Nanyang Technological University, SG

The accurate method to extract a small-signal subcircuit model of MOSFET’s based on BSIM4 is presented, a novel approach to determining the parasitic inductances by Z-parameters, the intrinsic terminal resistance and capacitance by Y-parameters are [...]

A Unified Environment for the Modeling of Ultra Deep Submicron MOS Transistors

Gneiting T., Advanced Modeling Solutions, DE

This paper discusses the aspects of modern MOS modeling requirements. Starting fro the fact, that even the Compact Model Council (CMC) outlined BSIM3v3 as a standard MOS simulation mode, many other models are used throughout [...]

A Surface-Potential-Based Extrinsic Compact MOSFET Model

Gu X., Gildenblat G., Workman G., Veeraraghavan S., Shapira S., Stiles K., Pennsylvania State University, US

This work presents the extrinsic part of a recently developed advanced surface-potential-based compact MOSFET model (SP). At present, it includes a novel engineering gate current model, a substrate current model valid in all regions of [...]

Primary Consideration on Compact Modeling of DG MOSFETs with Four-terminal Operation Mode

Nakagawa T., Sekigawa T., Tsutsumi T., Suzuki E., Koike H., Electroinformatics Group, AIST, JP

Recently, a double-gate structure has attracted much attention as an emerging device concept. The DG MOSFET is regarded as the most scalable device. Usually the DG MOSFET is supposed to be used as a three-terminal [...]

A Surface-Potential-Based Compact Model of NMOSFET Gate Tunneling Current

Gu X., Wang H., Gildenblat G., Workman G., Veeraraghavan S., Shapira S., Stiles K., Penn State University, US

The continued aggressive scaling of the gate oxide thickness makes the accurate modeling of the gate tunneling current an important aspect of the MOSFET compact model. This work presents a new compact model of which [...]

Substrate Current in Surface-Potential-Based Compact MOSFET Models

Gu X., Wang H., Chen T.L., Gildenblat G., Penn State University, US

A new substrate current model was developed which retains the simplicity of the original one but is applicable to all regions of the MOSFET operation with asymtotically correct behaviors and is well suited for use [...]

Noise Modeling with MOS Model 11 for RF-CMOS Applications

Scholten A.J., Tiemeijer L.F., van Langevelde R., Zegers-van Duijnhoven A.T.A., Havens R.J., Zegers-van Duijnhoven A.T.A., Venezia V.C., Klaassen D., Philips Research Laboratories Eindhoven, NE

The RF noise in 0.18um CMOS technology has been measured and modeled. Compared to long-channel theory we find only a moderate enhancement of the drain and current noise for short-channel MOSFETS and, due to the [...]

Quantum and Kinetic Simulation Tools for Nano-scale Electronic Devices

Fedoseyev A., Kolobov V., Arslanbekov R., Przekwas A., Balandin A., CFD Research Corporation, US

The progress in LSI technologies has resulted in scaling down semiconductor devices to nano-scale dimensions where kinetic and quantum effects in the carrier transport become crucial for the device performance. The transistor counts on the [...]

Single Transistor AND Gate

Chengalvala V., Zhang Y., Oklahoma State University, US

Double-gate SOI MOSFET structure opens the door for many novel devices by the coupling of the two gates. If the same voltage is applied to both gates, the depletion regions are equally partitioned. On the [...]

A Vertical MOSFET for Charge Sensing in the Convex Corner of Si Microchannels

Lim G., Park C-S, Lyu H-K, Kim D.S., Shin J-K, Choi P., Lee M., Kyungpook National University, KP

In this paper, we will present a vertical MOSFET formed in the convex corner of silicon microchannels which might be useful for detecting charged biomolecules. The cross type microchannels have four MOSFETs and four pairs [...]