A Unified Environment for the Modeling of Ultra Deep Submicron MOS Transistors

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This paper discusses the aspects of modern MOS modeling requirements. Starting fro the fact, that even the Compact Model Council (CMC) outlined BSIM3v3 as a standard MOS simulation mode, many other models are used throughout the semiconductor community. Their common approach is they are all highly scalable to cover a wide range of transistor dimensions. To cover this effect, a strategy for efficient model parameter extraction with a special emphasis on scalability is illustrated. This leads to a software architecture and a data base concept, which enables modeling engineers to handle the parameter extraction for different simulation models from one common measurement base in a very efficient and flexible way.

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Journal: TechConnect Briefs
Volume: 2, Technical Proceedings of the 2003 Nanotechnology Conference and Trade Show, Volume 2
Published: February 23, 2003
Pages: 368 - 371
Industry sector: Sensors, MEMS, Electronics
Topics: Compact Modeling
ISBN: 0-9728422-1-7