CMOS – TechConnect Briefs

A Hybrid Process Design Kit: Towards Integrating CMOS and III-V Devices

Chiah S.B., Zhou X., Lee K.E.K., Ng C.Y., Antoniadis D., Fitzgerald E.A., Nanyang Technological University, SG

A hybrid process design kit (PDK) for novel integrated circuits incorporating high performance compound semiconductor materials and devices into existing production Si-CMOS compatible foundry process is presented. The hybrid PDK permits direct integration of Au-free [...]

Nanofabrication Techniques for Fully Integrated Sensing Platforms

Mujeeb-U-Rahman M., Adalian D., Sencan M., Scherer A., California Institute of Technology, US

Designing small scale integrated systems for sensing and actuation has gained lots of interest in recent years. Currently, subsystems are fabricated separately and then bonded together to form an integrated platform. This poses a fundamental [...]

Finite Element Modeling and Simulation of Piezoelectric Energy Harvesters Fabricated in CMOS Technology

Mok A., Tigli O., University of Miami, US

Here we present a micron scale piezoelectric energy harvester fabricated in a commercial Complementary Metal Oxide Semiconductor (CMOS) technology. It is a trilayer cantilever model clamped on one end. The dimensions of this cantilever are [...]

Suppression of Variability in Metal Source/Drain SOI MOSFET with Partial Buried Oxide and δ-doping

Patil G.C., Qureshi S., Indian Institute of Technology Kanpur, IN

Recently, metal source/drain (S/D) dopant-segregated Schottky barrier (DSSB) SOI MOSFET has attracted the attention of researchers due to its planar structure, CMOS compatibility and reduced S/D series resistance at thin SOI film. However, employing dopant-segregation [...]

Bias Dependence of Low Frequency Noise in 90nm CMOS

Mavredakis N., Antonopoulos A., Bucher M., Technical University of Crete, GR

The bias dependence of low frequency noise (LFN) is investigated with measurements in 90nm CMOS. A recent charge-based LFN model combining carrier and mobility fluctuation components is compared to data from multi-finger devices with a [...]

Finite Element Modeling and Analysis of CMOS-SAW Sensors

Tigli O., Zaghloul M.E., Washington State University Vancouver, US

Finite element (FE) modeling and performance analysis of Surface Acoustic Wave (SAW) devices that are developed in CMOS (Complementary Metal Oxide Semiconductor) technology are presented. CMOS-SAW devices were designed, fabricated and characterized as a biosensor [...]

One-chip MOS Structure for Temperature Flow Sensor

Husak M., Boura A., Jakovenko J., Czech Technical University in Prague, CZ

There is presented a one-chip MOS structure of anemometric sensor system in the paper. The geometric arrangement of temperature sensors allows measurement of temperature gradient. Temperature gradient allows computation of direction of air flow over [...]

Monolithic CMOS MEMS technology development: A piezoresistive-sensors case study

Chaehoi A., Weiland D., O’Connell D., Bruckshaw S., Ray S., Begbie M., Institute for System Level Integration, UK

This paper presents the development of a monolithic CMOS-MEMS platform under the iDesign and SemeMEMS projects with the aim of jointly providing an open access “one-stop-shop” prototyping facility for integrated MEMS. This work addresses the [...]

PSP Model Equations Extension for Statistical Estimation of Leakage Current in Nanometer CMOS Technologies Considering Process Variations

D’Agostino C., Flatresse P., Beigne E., Belleville M., STMicroelectronics, FR

A novel analytical methodology is proposed for statistical leakage estimation of CMOS circuits considering statistical process variations. The goal of the proposed methodology is to obtain a time-efficient and accurate estimation of the PDF of [...]

Castellated-Gate MOSFETs as Power Transistors for Nanometer CMOS and Post-CMOS Integrated Nanosystems

Seliskar J.J., HiperSem Inc., US

Analysis of the constant-voltage scaling characteristics of Fully-Depleted Castellated Gate (FDCG) MOSFETs reveals near term opportunities for these devices as the replacement for the “thick oxide” I/O device in CMOS System-On-A-Chip (SoC) technologies (e.g. the [...]