A Hybrid Process Design Kit: Towards Integrating CMOS and III-V Devices

, , , , , ,
,

Keywords: , , , , , , ,

A hybrid process design kit (PDK) for novel integrated circuits incorporating high performance compound semiconductor materials and devices into existing production Si-CMOS compatible foundry process is presented. The hybrid PDK permits direct integration of Au-free III-V devices into CMOS circuits on a common Si-CMOS platform for high performance analog/RF, mixed-signal, digital or optoelectronic interconnect designs. It facilitates electrical information sharing between CMOS and III-V devices on a schematic design with foundry-proven back-end multi-layer metal interconnects in a single chip fabrication. It provides a motivation in fabricating integrated CMOS and III-V devices with commonly used CMOS libraries and III-V parameterized cell libraries within shorter design circle times for high-frequency, high-voltage, and high-power applications.

PDF of paper:


Journal: TechConnect Briefs
Volume: 4, Advanced Manufacturing, Electronics and Microsystems: TechConnect Briefs 2016
Published: May 22, 2016
Pages: 313 - 318
Industry sector: Sensors, MEMS, Electronics
Topic: WCM - Compact Modeling
ISBN: 978-0-9975-1173-4