Bucher M. – TechConnect Briefs

Optimization of the device design technologies for optimum analog/RF performance of Nanoscale DG MOSFETs

Sharma R.K., Bucher M., Technical University of Crete, GR

Analog/RF performance of new device architecture: graded channel dual material double gate (GCDMDG) is investigated using ATLAS device simulator. A close comparison with double gate (DG), graded channel double gate (GCDG) and dual material double [...]

Bias Dependence of Low Frequency Noise in 90nm CMOS

Mavredakis N., Antonopoulos A., Bucher M., Technical University of Crete, GR

The bias dependence of low frequency noise (LFN) is investigated with measurements in 90nm CMOS. A recent charge-based LFN model combining carrier and mobility fluctuation components is compared to data from multi-finger devices with a [...]

Starting Over: gm/Id-Based MOSFET Modeling as a Basis for Modernized Analog Design Methodologies

Foty D., Binkley D., Bucher M., Gilgamesh Associates, US

A method of interpreting MOSFET behavior is described which is more coherent for modern analog CMOS circuit design. This method supercedes the use of simple but antiquated equations in design, and replaces them with an [...]

The EKV 3.0 Compact MOS Transistor Model: Accounting for Deep-Submicron Aspects

Bucher M., Enz C., Krummenacher F., Sallese J.M., Lallement C., Porret A.S., National Technical University of Athens, GR

The EKV 3.0 compact MOS transistor model for advanced IC design is presented. Its basis is an ideal analytical charge-based model including static to non-quasistatic dynamic aspects and noise. The ideal model is extended to [...]

The Foundations of the EKV MOS Transistor Charge-Based Model

Enz C., Bucher M., Porret A.S., Sallese J.M., Krummenacher F., Swiss Center for Electronics and Microtechnology, CH

This paper presents the foundations that lead to the EKV MOS transistor compact model. It describes all the basic concepts required to derive the large-signal and smallsignal charge-based model that is valid in all modes [...]