mismatch – TechConnect Briefs

Experiment and Model for Distance-Dependent Mismatch

Lu N., Zamdmer N., Wachnik R., IBM, US

We study distance-dependent mismatch and spatial correlation problems both experimentally and theoretically. The two problems are intimately connected. We present our hardware results and, using the relationship between mismatch and correlation, show that the relationship [...]

A Full Differential Charge Pump Based on Symmetrical Complementary Half-Current Circuit Architecture

Huang Q., Zhao W., Wang W., Wu W., Du C., Feng Z., He J., He P., He J., He P., Song L., Peking University Shenzhen SOC Key Laboratory, CN

A full differential charge pump with low current mismatch and deviation is designed in this paper based on the symmetric complementary half-current circuit architecture. It adopts two symmetrical complementary P-N replica circuits with half value [...]

A Setup for Automatic MOSFET Mismatch Characterization under a Wide Bias Range

Klimach H., Galup-Montoro C., Schneider M.C., Federal University of Santa Catarina, BR

Mismatch is the denomination of time-independent variations between identically designed components. In analog circuits, the spread in the dc characteristics of supposedly matched transistors results in inaccurate or even anomalous circuit behavior. Also, for digital [...]

A Simple Yet Accurate Mismatch Model For Circuit Simulation

Jin Z., Lee Y.M., Watts J.S., Bonaccio A.R., Schroer G.J., Pai N.G., IBM, US

As technology scales, mismatch between a pair of transistors becomes a more and more critical issue for technology development and circuit designs. Scaling also increases the complexity of compact device modeling. Sophisticated models are usually [...]

Keywords: mismatch

Experiment and Model for Distance-Dependent Mismatch

A Full Differential Charge Pump Based on Symmetrical Complementary Half-Current Circuit Architecture

A Setup for Automatic MOSFET Mismatch Characterization under a Wide Bias Range

A Simple Yet Accurate Mismatch Model For Circuit Simulation

Analog Compact Modeling for a 20-120V HV CMOS Technology

How To Design for Analog Yield using Monte Carlo Mismatch SPICE Models

All-Region MOS Model of Mismatch due to Random Dopant Placement

Mismatch Improvement with XMOS Structure