Electron device matching has been a key factor on the performance of today’s analog or even digital electronic circuits. This paper presents a study of drain current matching in MOS transistors. A model for MOS transistor mismatch was developed, using the carrier number fluctuation theory to account for the effects of local doping fluctuations. CMOS test structures were also designed and fabricated as a way to develop an extensive experimental work, where current mismatch was measured under a wide range of bias conditions.The model shows a good fitting with measurements over a wide range of operation conditions, from weak to strong inversion, from linear to saturation region, and allows the assessment of mismatch from process and geometric parameters.
Journal: TechConnect Briefs
Volume: Technical Proceedings of the 2005 Workshop on Compact Modeling
Published: May 8, 2005
Pages: 127 - 130
Industry sectors: Advanced Materials & Manufacturing | Sensors, MEMS, Electronics
Topic: Nanoparticle Synthesis & Applications