US – Page 435 – TechConnect Briefs

Unified Statistical Modeling for Circuit Simulation

McAndrew C., Drennan P.G., Motorola, US

Accurate statistical simulation and modeling are important for IC design. Different types of statistical simulation require different types of statistical models. In this paper a unified approach to statistical modeling and characterization is presented. Based [...]

Automatic Generation of RF Compact Models from Device Simulation – Part I: Motivation and methodology

Luryi & A. Pacelli S., State University of New York at Stony Brook, US

We review a recently proposed methodology for automatic generation of equivalent circuits from physical device simulation. The method is based on the calibration of a simplified equivalent-circuit model on simulation results, and can achieve an [...]

Present Status and Future Direction of BSIM SOI Model for High-Performance/Low-Power/RF Application

Fung S., Su P., Hu C., IBM Microelectronics, US

The recent progress of BSIM (Berkeley Short-channel IGFET Model) SPICE models extended for SOI transistors are reviewed. The models cover partially depleted (PD), fully depleted (FD) and dynamic depletion (FD) (automatically transition between PD and [...]

A Unified Process-Based Compact Model for Scaled PD/SOI and Bulk-Si MOSFETs

Fossum J.G., University of Florida, US

A process/physics-based compact model (UFPDB), unified for PD/SOI and bulk-Si MOSFETs with a single small set of parameters, is overviewed. The utility of UFPDB, e.g., for benchmarking PD/SOI and bulk-Si CMOS and for projecting performances [...]

Starting Over: gm/Id-Based MOSFET Modeling as a Basis for Modernized Analog Design Methodologies

Foty D., Binkley D., Bucher M., Gilgamesh Associates, US

A method of interpreting MOSFET behavior is described which is more coherent for modern analog CMOS circuit design. This method supercedes the use of simple but antiquated equations in design, and replaces them with an [...]

Overview of An Advanced Surface-Potential-Based MOSFET Model (SP)

Gildenblat G., Chen T.L., Pennsylvania State University, US

This paper outlines a new surface-potential-based compact MOSFET model (SP) developed at The Pennsylvania State University. The main objective of this work is to find practical engineering solutions of several long-standing problems of surface-potential-based modeling [...]

Standardization and Validation of Compact Models

Brooks B., Green K., Krick J., Vrotsos T., Weiser D., Texas Instruments, US

The idea of standardizing compact (SPICE-like) models has recently gained momentum in the semiconductor industry. However, since compact model equations reside in software, the concept of standardization is difficult. Several key issues must be addressed, [...]

Detailed Comparison of the SP2001, EKV, and BSIM3 Models

Bendix P., LSI Logic, US

Practical comparisons are made of three available or soon to be available compact MOS models----SP2001 (surface potential 2001), EKV, and BSIM3. They are compared both in their DC and AC quality of fits to measured [...]

Challenges of Modeling VLSI Interconnects in the DSM Era

Arora N.D., Simplex Solutions, US

As VLSI technology shrinks to deep sub-micron (DSM) geometries (below 0.18mm), the parasitic due to interconnects are becoming a limiting factor in determining circuit performance. An accurate modeling of interconnect parasitic resistance (R), capacitance (C) [...]

Characterization of “Multipath Interconnects” for Microelectronic and Nanotechnology Circuits

Goel A.K., Eady N.R., Michigan Technological University, US

A multipath interconnect carries a signal by using the concept of parallel processing by providing two or more paths between the driver and the load. These paths are stacked vertically isolated from one another by [...]