Sensors, MEMS, Electronics – Page 299

Ultra Thin Packaging of the RF-MEMS Devices with Low loss

Park H-W., Park Y.K., Kim C.J., Kim H., Kim Y.K., Kim C.J., Kim H., Kim Y.K., Lee D.J., Park H-W., Park Y.K., Kim C.J., Kim H., Kim Y.K., Ju B.K., Korea Institute of Science and Technology, KR

RF-MEMS devices have the potential for providing an overarching circuit integration technology that can significantly reduce the size, weight and cost. In this research, as ultra thin silicon substrate which has thickness of 50um was [...]

Accurate Modeling for RF Silicon MOSFET up to 15 GHz and the Parameter Extraction Methodology

Lin J., Kiat Seng Y., Jian Guo M., Manh Anh D., Nanyang Technological University, SG

The accurate method to extract a small-signal subcircuit model of MOSFET’s based on BSIM4 is presented, a novel approach to determining the parasitic inductances by Z-parameters, the intrinsic terminal resistance and capacitance by Y-parameters are [...]

RF Device Design

Changing the Paradigm for Compact Model Integration in Circuit Simulators Using Verilog-A

Mierzwinsk M., Halloran P.O., Troyanovsky B., Dutton R., Tiburon Design Automation, Inc., US

Verilog-A has been demonstrated to be a suitable language to describe analog models. However, effective adoption by both the Electronic Design Automation (EDA) industry and end users requires that the language implementation provide all of [...]

Standardization of Compact Device moding in High Level Description Language

Lemaitre L., McAndrew C., Grabinski W., Motorola, CH

This paper proposes a methodology based on hardware description languages (HDL) to efficiently develop compact device models. After an introduction to compact device modeling we describe Verilog-AMS, a popular HDL. Then we show how Verilog-AMS [...]

A Unified Environment for the Modeling of Ultra Deep Submicron MOS Transistors

Gneiting T., Advanced Modeling Solutions, DE

This paper discusses the aspects of modern MOS modeling requirements. Starting fro the fact, that even the Compact Model Council (CMC) outlined BSIM3v3 as a standard MOS simulation mode, many other models are used throughout [...]

A Surface-Potential-Based Extrinsic Compact MOSFET Model

Gu X., Gildenblat G., Workman G., Veeraraghavan S., Shapira S., Stiles K., Pennsylvania State University, US

This work presents the extrinsic part of a recently developed advanced surface-potential-based compact MOSFET model (SP). At present, it includes a novel engineering gate current model, a substrate current model valid in all regions of [...]

Compact Modling of High Frequency Phenomena for On-Chip Spiral Inductors

Talwalkar N., Yue P., Wong S., Stanford University, US

This paper presents a physics-based compact model for predicting high frequency performance of spiral inductors. The model accurately accounts for skin effect and proximity effect in the metal conductors as well as eddy current loss [...]

Unified RLC Model for On-Chip Interconnects

Sim S-P., Yang C., Santa Clara University, US

We present a unified RLC model for deep sub-micron on-chip interconnects. The model consists of two components, a quasi-3D capacitance extraction based on a novel concept of "effective width" and a effective loop inductance model. [...]

An Automatic Macro Program developed for Characterization, Parameter Extraction and Statistic Analysis of Spiral Inductors

Huang G.W., Chiu D.Y., Chen K.M., National Nano Device Laboratories, TW

In the paper, a macro program based on Agilent IC-CAP software is developed for characterization, parameter extraction and statistic analysis of on chip spiral inductors. All procedures can be finished very easily in few buttons [...]