Papers – Page 690 – TechConnect Briefs

Non-standard geometry scaling effects

Lehmann S., Technische Universität Dresden, DE

The impact of process and geometry effects on important electrical parameters of SiGe HBTs as a function of emitter width is investigated and explained using device and circuit simulations. The goal is to provide a [...]

Modeling the electrical characteristics of FET-type sensors for biomedical applications

Deen M.J., Shinwari M.W., McMaster University, CA

Uniquely examining and identifying biological pathogens is of great importance in health care, as it facilitates early detection, isolation and possibly prevention of many diseases. Availability of highly efficient and easily produced sensors could have [...]

Analysis of Halo Implanted MOSFETs

McAndrew C.C., Drennan P.G., Freescale Semiconductor, US

MOSFETs with heavily doped regions at one or both ends of the channel exhibit some quantitative differences in electrical behavior compared to devices with laterally unform channel doping. These can include a peakiness to the [...]

Modeling the Geometry-Dependent Parasitics in Multi-Fin FinFETs

Chan M., Wu W., HKUST, HK

The geometry-dependent parasitic components in multi-fin FinFETs are studied. The gate-resistance has a stronger dependent on the device geometry compared with the planar MOSFETs. Parasitic fringing capacitance and overlap capacitance become highly coupled to the [...]

Archives: Papers

Non-standard geometry scaling effects

Modeling the electrical characteristics of FET-type sensors for biomedical applications

Analysis of Halo Implanted MOSFETs

Modeling the Geometry-Dependent Parasitics in Multi-Fin FinFETs

High Voltage MOSFET’s Modeling Review

A Computationally Efficient Method for Evaluating Distortion in DG MOSFETs

Explicit Short Channel Compact Model of Independent Double Gate Mosfet

Compact modeling of drain current in Independently Driven Double-Gate MOSFETs

Impact of Gate Induced Drain Leakage and Impact Ionization Currents on Hysteresis Modeling of PD SOI Circuits

Optimal Skew Corners for Compact Models