Kikuchihara H. – TechConnect Briefs

Compact Modeling of Long-Term MOSFET Degradation for Predicting Circuits Degradation

Miyamoto H., Ma C., Mattausch H.J., Miura-Mattausch M., Tanoue H., Tanimoto Y., Kikuchihara H., Mattausch H.J., Miura-Mattausch M., Miura-Mattausch M., Hiroshima University, JP

[Introduction] Prediction methods of long-term degradation of both p- and n-type metal oxide semiconductor field effect transistors (MOSFETs) in CMOS circuits is proposed. During CMOS circuit degradation, not all the MOSFETs but only several MOSFETs [...]

HiSIM-SOTB: A Compact Model for SOI-MOSFET with Ultra-Thin Si-Layer and BOX

Miura-Mattausch M., Kikuchihara H., Feldmann U., Nakagawa T., Miyake M., Iizuka T., Mattausch H.J., Miura-Mattausch M., Hiroshima University, JP

The Silicon-On-Thin-Buried-Oxide (SOTB) transistor is a descendant of the conventional SOI MOSFET with thin Silicon and BOX layers. Many different structure and material variations are possible, where the choice of a thicker BOX may be [...]

Modeling of DMOS Device for High-Voltage Applications Based on 2D Current Flow

Ueno F., Tanaka A., Miyake M., Iizuka T., Yamamoto T., Kikuchihara H., Mattausch H.J., Miura-Mattausch M., Miura-Mattausch M., Hiroshima University, JP

High-voltage devices are utilized for a variety of applications, with application voltages ranging from a few volts to a few hundred volts. To develop efficient circuits for the variety of applications, accurate modeling of the [...]

Modeling of the impurity-gradient effect in high-voltage MOSFETs

Maekawa Y., Fukushima K., Tanaka A., Kikuchihara H., Miyake M., Mattausch H.J., Miura-Mattausch M., Miura-Mattausch M., Hiroshima University, JP

Two major high-voltage MOSFET types are commonly used by semiconductor industries. One has a symmetrical structure, and the other has a laterally-diffused asymmetric structure called LDMOS. Here our focus is the LDMOS structure, where an [...]

Complete Surface-Potential Modeling Approach Implemented in the HiSIM Compact Model Family for Any MOSFET Type

Miura-Mattausch M., Miyake M., Kikuchihara H., Feldmann U., Amakawa S., Mattausch H.J., Miura-Mattausch M., Hiroshima University, JP

Many possible future device structures are investigated in parallel to obtain highest performance features. It has been shown that an SOI-MOSFET with a thin body enables both high device performances and suppression of statistical variations. [...]