Nanyang Technological University – Page 3

A Unified Compact model for FinFET and Silicon Nanowire MOSFETs

Zhu G.J., Zhou X., See G.H., Lin S-H, Wei C.Q., Zhang J.B., Nanyang Technological University, SG

A unified compact model for FinFET and Silicon Nanowire (SiNW) MOSFETs including all major short channel effects is presented. Source-Drain symmetry, which is a fundamental feature of an ideal MOSFET, is preserved. The unified compact [...]

Interface Traps in Surface-Potential-Based MOSFET Models

Chen Z., Zhou X., See G.H., Zhu G., Zhu Z., Zhu G., Zhu Z., Nanyang Technological University, SG

Surface or interface properties along the surface channel region have great influences on the MOSFET characteristics. The interface-trap density increases during the repeated program-erase cycling of non-volatile floating-gate and SONOS memory transistors. Thus, the compact [...]

High dielectric tunability of Ba0.6Sr0.4TiO3 thin film deposited by radio-frequency sputtering

Zuyong F., Nanyang Technological University, SG

Recently, the nonlinear dielectric property of BST thin films has been investigated for the development of frequency agile RF and highper formance microwave tunable devices, which include phase shifters, tunable filters, steerable antennas, varactors, and [...]

Yellow electroluminescence from sputtering synthesized aluminum nitride nanocomposite thin film containing aluminum nanocrystals

Yang M., Chen T.P., Liu Y., Wong J.I., Nanyang Technological University, SG

In this work, visible electroluminescence (EL) from aluminum nitride (AlN) thin films containing aluminum nanocrystals (nc-Al) prepared by a radio frequency sputtering technique is reported. The yellow EL shows a spectrum peaked at 565 nm. [...]

A Technique for Constructing RTS Noise Model Based on Statistical Analysis

Wei C.Q., Xiong Y.Z., Zhou X., Nanyang Technological University, SG

In this paper, a technique for constructing the RTS noise model based on the statistical analysis of the noise data obtained from the Schottky diode under different biases is introduced. The three RTS parameters: pulse [...]

Interface-trap Charges on Recombination DC Current-Voltage Characteristics in MOS transistors

Chen Z., Jie B.B., Sah C-T, Nanyang Technological University, SG

The interface traps and trapped charges along the surface channel region are generated during transistor stress or operation and primarily responsible for the changes of device properties. The threshold voltage is varied by the generation [...]

Unified Regional Surface Potential for Modeling Common-Gate Symmetric/Asymmetric Double-Gate MOSFETs with Any Body Doping

See G.H., Zhou X., Zhu G., Zhu Z., Zhu G., Zhu Z., Lin S., Wei C., Zhang J., Srinivas A., Nanyang Technological University, SG

Double-gate MOSFET is one of the key potential devices to allow further extension of CMOS technology scaling. The compact modeling community faces great challenges to model the physical effects due to the coupling of the [...]

Quasi-2D Surface-Potential Solution to Three-Terminal Undoped Symmetric Double-Gate Schottky-Barrier MOSFETs

Zhu G., Zhu Z., See G.H., Zhou X., Zhu G., Zhu Z., Lin S., Wei C., Zhang J., Srinivas A., Nanyang Technological University, SG

The quasi-2D method has been used to account for short-channel effects in PN-junction MOSFETs. Recently some authors applied the quasi-2D solution to SB MOSFETs to derive potential profiles. In this paper, an improved quasi-2D solution [...]

Unified Regional Surface Potential for Modeling Common-Gate Symmetric/Asymmetric Double-Gate MOSFETs with Quantum-Mechanical Effects

See G.H., Zhou X., Zhu G., Zhu Z., Zhu G., Zhu Z., Lin S., Wei C., Zhang J., Srinivas A., Nanyang Technological University, SG

The quantum mechanical effect (QME) in nanoscale MOSFETs has become more and more important. The quantization of the space charge density in bulk-MOS compact models is usually modeled by the van Dort model with a [...]

New Properties and New Challenges in MOS Compact Modeling

Zhou X., See G.H., Zhu G., Zhu Z., Zhu G., Zhu Z., Lin S., Wei C., Srinivas A., Zhang J., Nanyang Technological University, SG

As bulk-MOS technology is approaching its fundamental limit, non-classical devices such as multiple-gate (MG) and silicon-nanowire (SiNW) transistors emerge as promising candidates for future generation device building blocks. This trend poses new challenges in developing [...]