US – Page 355 – TechConnect Briefs

A Study of Figures of Merit for the High Frequency Behavior of MOSFETs in RF IC Applications

Cheng Y., Siliconlinx, US

This paper is to review important device parameters as the figures of merit (FOM) to understand the device characteristics for analog/RF applications. These FOM should be characterized and evaluated in technology development and model generation [...]

Challenges in Compact Modeling for RF and Microwave Applications

Niknejad A., Dunga M., Heydari B., Wan H., Lin C.H., Emami S., Doan C., Xi X., He J., Heydari B., Hu C., University of California at Berkeley, US

Commercial CMOS chips routinely operate at frequencies up to 5 GHz and exciting new opportunities exists in higher frequency bands such as 3-10 GHz, 17 GHz, 24 GHz, and 60 GHz. Many research groups have [...]

Physics-Based, Non-Charge-Sheet Compact Modeling of Double-Gate MOSFETs

Lu H., Taur Y., University of California at San Diego, US

A physics-based, non-charge-sheet analytic potential model is presented for undoped (or lightly doped) Double Gate (DG) MOSFETs. With only the mobile charge term included, Poisson’s equation is rigorously solved and the electrostatic potential is derived [...]

Modeling and Characterization of High Frequency Effects in ULSI Interconnects

Arora N.D., Song L., Cadence Design Systems, US

This paper discusses the accurate modeling of resistance R, inductance L and capacitance C in sub-100nm process node and their impacts on high frequency effects such as delay, crosstalk, and power/ground bounce. Models of interconnect [...]

Correlated Noise Modeling and Simulation

McAndrew C., Coram G., Blaum A., Pilloud O., Freescale Semiconductor, US

This paper addresses several issues in noise modeling and simulation. It shows how correlated noise can be implemented in Verilog-A, and presents a new and simple technique to simulate the noise correlation coefficient using only [...]

Mobility Extraction and Compact Modeling for FETs Using High-K Gate Materials

Dutton R.W., Liu Y., Choi C-H, Chen T.W., Stanford University, US

This simulation work discusses the impact of direct gate tunneling on effective mobility extraction methods, particularly the Inversion Charge Pumping (ICP) method proposed recently for transistors with high-k gate dielectrics. The valence-band electron gate tunneling [...]

Introduction to PSP MOSFET Model

Gildenblat G., Li X., Wang H., Wu W., van Langevelde R., Scholten A.J., Smit G.D.J., Klaassen D.B.M., Pennsylvania State University, US

PSP is the latest and the most advanced compact MOSFET model developed by merging the best features of the two surface potential-based models: SP (devel- oped at The Pennsylvania State University) and MM11 (developed by [...]

Advanced Compact Models for MOSFETs

Watts J., McAndrew C., Enz C., Galup-Montoro C., Gildenblat G., Hu C., van Langevelde R., Miura-Mattausch M., Rios R., Sah C-T, Joint Paper, US

The combination of decreasing MOSFET dimensions and increasing use of MOSFETs for analog and RF application has created the need for advanced compact models for MOSFET circuit design. The first generation of MOSFET models rely [...]

A History of MOS Transistor Compact Modeling

Sah C-T, University of Florida, US

The MOSFET (Metal-Oxide-Silicon Field-Effect- Transistor) or MOS Transistor (MOST) is a three dimensional electronic device. It operates on the conductivity modulation principle in a thin semiconductor layer by a controlling electric field to give amplifying [...]

Fault Tolerant Quantum Computation with new Reversible Gate

Vasudevan D.P., Lala P.K., Parkerson J.P., University of Arkansas, Fayetteville, US

Current CMOS technology will be promising only for the next two decades or less until it reaches its physical limit. Once the atomic level of system design comes to the road of technology, Quantum mechanics [...]