Papers – Page 79 – TechConnect Briefs

A unique opportunity for industrial scale fabrication of semiconductor nanowire-based devices

Nikoobkht B., National Institute of Standards and Technology, US

A method is developed which enables horizontal growth of semiconductor nanowires on predefined locations. In this architecture, despite most bottom-up approaches, there is no need for post-growth treatments and alignment of nanowires on a given [...]

InSb and GaInSb nanowires for thermoelectric applications

Ye Q.L., Scheffler R., Kumari J., Leverenz R., NASA Ames Research Center, US

One-dimensional III-V compound semiconductor nanowires are an important class of nanomaterials that possess unique structures, remarkable properties, and great potential in various applications. InSb represents the smallest band-gap III-V compound semiconductor (0.17 eV at room [...]

One-dimensional Phase-Change Nanowires for Information Storage Application

Sun X.H., Yu B., NASA Ames Research Center, US

The electrically operated phase-change random access memory (PRAM) features faster write/read, improved endurance, and much simpler fabrication as compared with the traditional transistor-based nonvolatile semiconductor memories. Low-dimensional phase-change materials in nanoscale dimensions offer advantages over [...]

Monte Carlo Algorithm for Nanoscale Electro-Thermal Optimization

Skorek A.W., Ble S.V., Anders G., Nazarko J., University of Quebec at Trois-Rivieres, CA

In this paper, we will present a Monte Carlo method based algorithm established for a sample nanoelectronics device. We are assuming that at the nanoscale level like at the highest the thermal phenomena are important [...]

QBITS Simulations for Develompment of Quantum Computer using the DSP 6711

Téllez V.H., Duchen G., Campero A., Iuga C., UAM, MX

Quantum computation is a new technology with the potential for providing exponential parallelism, but a quantum computation is a series of quantum logic gates. This work uses the DSP 6711 to simulate the different quantum [...]

Ab initio calculation of tunneling current through ultra-thin SiO2 gate dielectric of MOS Structure, including the influence of oxygen vacancies on the tunneling current

Nadimi E., Janisch R., Radehaus C., TU Chemnitz, DE

We used a first-principle atomistic scale method, based on density functional theory and non-equilibrium Green’s function to study the electron tunneling current through ultra thin silicon oxide films. The Si/SiO2 model interface has been constructed [...]

Nanoscale Device Modeling and Simulation: Multiple Independent gate Field Effect Transistor

Kim H-G, Inha University, KR

we report our numerical modeling and simulation results for MIGFET. The simulation result revealed that MIGFET demonstrates dynamic modulation of sub-threshold swing and threshold voltage by biasing the second gate. And Short channel effects are [...]

Robust design of quantum potential profile for electron in semiconductor nanodevices

Zhang J., Kosut R., SC Solutions, US

In this paper we address the robust design of the quantum potential profile in a in semiconductor nanodevice to achieve a desired electron transmission coefficient vs. bias voltage characteristic despite uncertainty. We formulate an optimization [...]

Electron Effective Mass Of GaAs Double-Concentric Quantum Rings

Filikhin I., Deyneka E., Vlahovic B., North Carolina Central University, US

We carried out the calculations for the single carrier energy levels, and the optical transitions of these structures, with taking into account the effects resulting in change of the electron effective mass due to the [...]

First-principles Modeling of Magnetic Memory Components — Preliminary Results on the Effects of Interface Oxides

Stilling M., Stokbro K., Flensberg K., Atomistix, DK

Magnetotunnel junctions (MTJs), exhibiting high tunneling magnetoresistance (TMR), are currently being employed in new generations of hard disk drive (HDD) read heads and novel magnetic random access memory (MRAM) technology. We have modeled such spintronic [...]