Papers – Page 21 – TechConnect Briefs

Standardization of Compact Device moding in High Level Description Language

Lemaitre L., McAndrew C., Grabinski W., Motorola, CH

This paper proposes a methodology based on hardware description languages (HDL) to efficiently develop compact device models. After an introduction to compact device modeling we describe Verilog-AMS, a popular HDL. Then we show how Verilog-AMS [...]

A Unified Environment for the Modeling of Ultra Deep Submicron MOS Transistors

Gneiting T., Advanced Modeling Solutions, DE

This paper discusses the aspects of modern MOS modeling requirements. Starting fro the fact, that even the Compact Model Council (CMC) outlined BSIM3v3 as a standard MOS simulation mode, many other models are used throughout [...]

A Surface-Potential-Based Extrinsic Compact MOSFET Model

Gu X., Gildenblat G., Workman G., Veeraraghavan S., Shapira S., Stiles K., Pennsylvania State University, US

This work presents the extrinsic part of a recently developed advanced surface-potential-based compact MOSFET model (SP). At present, it includes a novel engineering gate current model, a substrate current model valid in all regions of [...]

Compact Modling of High Frequency Phenomena for On-Chip Spiral Inductors

Talwalkar N., Yue P., Wong S., Stanford University, US

This paper presents a physics-based compact model for predicting high frequency performance of spiral inductors. The model accurately accounts for skin effect and proximity effect in the metal conductors as well as eddy current loss [...]

Unified RLC Model for On-Chip Interconnects

Sim S-P., Yang C., Santa Clara University, US

We present a unified RLC model for deep sub-micron on-chip interconnects. The model consists of two components, a quasi-3D capacitance extraction based on a novel concept of "effective width" and a effective loop inductance model. [...]

An Automatic Macro Program developed for Characterization, Parameter Extraction and Statistic Analysis of Spiral Inductors

Huang G.W., Chiu D.Y., Chen K.M., National Nano Device Laboratories, TW

In the paper, a macro program based on Agilent IC-CAP software is developed for characterization, parameter extraction and statistic analysis of on chip spiral inductors. All procedures can be finished very easily in few buttons [...]

Multidimensional Model-Based Parameter Estimation Method for Compact Modeling of High-Speed Interconnects

Dhaene T., University of Antwerp, BE

A new multivariate modeling technology is developed that allows engineers to define the frequency range, layout parameters, material properties and desired accuracy for automatic generation of simulation models of general passive electrical structures. It combines [...]

An Interactive Website as a Tool for CAD of Power Circuits

Swiercz B., Starzak L., Zubert M., Napieralski A., Technical University of Lodz, PL

The rapid development of microelectronics results in more complex semiconductor device structures and makes it necessary to use modern computer software. However, high prices and hardware requirements considerably limit the access to these CAD tools [...]

Unified Length-/Width-Dependent Drain Current Model for Deep-Submicron MOSFETs

Chiah S.B., Zhou X., Lim K.Y., Nanyang Technological University, SG

The motivation of this work is to develop a unified geometry-dependent drain current (Ids) model for the entire range of drawn length (L) and drawn width (W) without binning, considering all important short-/narrow-channel effects including [...]

Unified Length-/Width-Dependent Threshold Voltage Model with Reverse Short-Channel and Inverse Narrow-Width Effects

Chiah S.B., Zhou X., Lim K.Y., Nanyang Technological University, SG

The objective of this work is to develop a unified geometry-dependent scalable threshold voltage (Vt) model for the entire range of drawn length (L) and drawn width (W) without binning, including reverse short-channel effect (RSCE) [...]