circuit simulation – Page 3 – TechConnect Briefs

Unified Statistical Modeling for Circuit Simulation

McAndrew C., Drennan P.G., Motorola, US

Accurate statistical simulation and modeling are important for IC design. Different types of statistical simulation require different types of statistical models. In this paper a unified approach to statistical modeling and characterization is presented. Based [...]

Xsim: A Compact Model for Bridging Technology Developers and Circuit Designers

Zhou X., Nanyang Technological University, SG

This paper describes the ideas and philosophy behind a new compact model (CM) for deep-submicron MOSFETs, called Xsim, which has been developed from scratch over the past few years. Similarities to and differences from existing [...]

Engineering BSIM for the Nano-Technology Era and Beyond

Chan M., Hu C., Hong Kong University of Science and Technology, HK

This paper presents the current status of the forth generation BSIM model and issues of modeling CMOS based devices with nanometer dimensions. Due to the divergence of device structures in sub-0.1 m gate length, it [...]

The New Approach to the Power Semiconductor Devices Modelling

Starzak L., Zubert M., Napieralski A., Technical University of Lodz, PL

Due to their specific structures the power devices need special models different from those developed for low power electronics. The development of such special models is far from being simple as distributed nature of phenomena [...]

Novel Computing Architecture on Arrays of Josephson Persistent Current Bits

Han J., Jonker P., Delft University of Technology, NL

A superconducting qubit (or quantum bit), which consists of a micrometer-sized loop with three Josephson junctions, has two persistent currents of opposite direction as its two states. The states of the qubit can be brought [...]

Extraction of Coupled RLC Network from Multi-level Interconnects for Full Chip Simulation

Yoon S., Won T., Inha University, KR

In this paper, an approach is proposed for extracting coupled RLC network from multi-level interconnects. The proposed approach starts with a step of partitioning the layout of the full-chip under consideration into several sub-layouts, followed [...]

A New Compact Model of Floating Gate Non-Volatile Memory Cells

Larcher L., Pavan P., Gattel F., Albani L., Marmiroli A., Università di Modena e Reggio Emilia, IT

This paper presents a new compact model of Floating Gate Non-Volatile Memory Cells using SPICE circuit elements. It features many advantages compared to previous models: it is simple and easy to implement and to update, [...]

Relaxation-based Circuit Simulation for Large-scale Circuits with Lossy Transmission Lines

Chen C-J., Chinese Culture University, TW

This paper integrates a time-domain transmission line calculation method and relaxation-based circuit dimulation algoright, and investigates the transient response simulation of large-scale circuits with transmission lines. Experimental results have been provided to justify the performance [...]

Partial-Element Equivalent-Circuit Model Simulation for Designing RF-Wireless Communication Products with Embedded Passive Components

Smith W.R., National Semiconductor Corporation, US

Rapidly increasing functionality and performance of RF/wireless communication products, along with mandated decreases in size, weight, and cost, have created a critical need to replace discrete, surface-mounted passive circuit components with embedded passives in substrate [...]