US – Page 210 – TechConnect Briefs

A Fan-in Bounded Low Delay Adder for Nanotechnology

Sun Y., Wagh M.D., Lehigh University, US

This paper presents an adder designed specifically for nanoelectronics. It exploits the basic characteristics of nanoelectronic technologies such as the RTD, SET and QCA to provide an adder that has a very low delay and [...]

A New QCA Architecture for the Future of Nano-Scale Computing

Hook IV L.R., Lee S-C, University of Oklahoma, US

By the time CMOS reaches its physical scaling limits in the next several years, computing will have very likely evolved to meet the demands imposed with increases in application complexity and the processing of enormous [...]

An Architecture for Designing Noise-Tolerant QCA Nanocircuits

Lee S-C, Hook IV L.R., University of Oklahoma, US

Due to many random factors from thermal fluctuations to wave interference, computation perfection in nanoICs is hard to achieve. Defects and faults arise from noise susceptibility of nanoICs which leads to unreliable results. A probabilistic [...]

Self – Heating Effects in Nanowire Transistors

Hossain A., Raleva K., Vasileska D., Goodnick S.M., Arizona State University, US

We investigate the role of self-heating effects on the electrical characteristics of a silicon nanowire transistor using a 3-D Monte Carlo device simulator that includes self-consistent solution of the energy balance equations for both acoustic [...]

Jet-printed Si nanowires for flexible backplane applications

Wong W.S., Raychaudhuri S., Sambandan S., Lujan R., Street R.A., Palo Alto Research Center, US

The integration of Si nanowire (Si NW) materials with low-temperature plastic substrates can enhance the performance of low-cost flexible electronics. We report the properties of Si NW field-effect transistors (FETs) fabricated with various contact metals [...]

Atomistic Simulations of Electronic Structure in Realistically-Sized Wurtzite InN/GaN Quantum Dots

Yalavarthi K., Gaddipati V., Ahmed S., Southern Illinois University at Carbondale, US

In this work, within a fully atomistic framework, we investigate the electronic structure of wurtzite InN quantum dots self-assembled on GaN substrates. The main objectives are two-fold: (1) to explore the origin, nature and the [...]

Neighbouring Levels Statistic and Shape of Quantum Dots: Si/Sio2

Filikhin I., Matinyan S.G., Vlahovic B., North Carolina Central University, US

We model the Si quantum dots (QDs) embedded into the SiO2 substrate. Single sub-band effective mass approach is used to calculate energy levels of electrons and heavy holes. For weak confinement regime (QD size D [...]

3-state Quantum Dot Gate FETs in Designing High Sampling Rate ADCs

Karmakar S., Chandy J.A., Jain F.C., University of Connecticut, US

In this work we present Cadence simulation of 3-bit Analog-to-Digital Converters (ADCs) based on compact 3-QDFET comparators, using 32nm design rules with BSIM 3.2.0 and BSIM 3.2.4 models [3]. In addition, we present the precise [...]

Backside Nanoscale Texturing to Improve IR Response of Silicon Photodetectors

Forbes L., Louie M.Y., Oregon State University, US

When the silicon is not strongly absorbing in the near infrared a back side textured surface works in conjunction with a totally internally reflecting front side surface to best increase the absorption of near infrared [...]

Application of YAG Laser Micro-Welding in MEMS Packaging

Bozorgi P., university of california, santa barbara, US

This paper reports a new packaging method for a wide range of MEMS for application on both the wafer and device scale. We show a complete set of experimental and modeling results for the application [...]