Compact Modeling

Theory, Development and Applications of the Advanced Compact MOSFET (ACM) Model

Galup-Montoro C., Schneider M.C., Cunha A.I.A., Gouveia-Filho O.C., Universidade Federal de Santa Catarina, BR

This paper presents a physics-based advanced compact MOSFET (ACM) model. The ACM model is composed of very simple expressions, valid for any inversion level, conserves charge and preserves the source-drain symmetry of the transistor. We [...]

USIM Design Considerations

Bell A., Singhal K., Gummel H., Agere Systems, US

Compact models need to be carefully designed to predict circuit behavior efficiently, accurately and robustly. A variety of effects must work together and be consistently integrated into the model equations with redundancy. USIM is a [...]

A Basic Property of MOS Transistors and its Circuit Implications

Vittoz E., Enz C., Krummenacher F., Swiss Center for Electronics & Microtechnology, CH

The MOS transistor drain current is the (linear) superposition of independent and symmetrical effects of source and drain voltages. This basic property is not affected by the geometry or symmetry of the transistor, by the [...]

Implications of Gate Tunneling and Quantum Effects in the Gate-Channel Stack

Dutton R., Choi C-H, Stanford University, US

Simulation and modeling of gate tunneling current for thin-oxide MOSFETs and Double-Gate SOIs are discussed. Guidelines for design of leady MOS capacitors are proposed. Resonant gate tunneling current in DG SOI is simulated, based on [...]

New Compact Model for Generation Drain Current Transients in Weak and Moderate Inversions of Submicron Floating-Body PD SOI MOSFETs

Ionescu A.M., Munteanu D., Swiss Federal Institute of Technology-EPFL, CH

In this paper, generation-type drain current transients, in advanced (down to 50nm gate-length) floating-body PD SOI MOSFETs are investigated by 2D numerical simulation in weak inversion operation. An original compact analytical model is derived for [...]

Physically-Based Approach to Deep-Submicron MOSFET Compact Model Parameter Extraction

Chiah S.B., Zhou X., Lim K.Y., See A., Chan L., Nanyang Technological University, SG

This paper demonstrates a physically-based approach to parameter extraction of the compact Ids model we have developed for deep-submicron technology development. A two-iteration parameter-extraction scheme is described, which improves the previous one-iteration approach. Parameter calibration [...]

Compact Model for Manufacturing Design and Fluctuation Study

Lim K.Y., Zhou X., Chartered Semiconductor Manufacturing Ltd., SG

In this article, a physics based compact model [1, 2] has been used as a tool for manufacturing process variability study. Three critical end-of-line (EOL) measured electrical testing (ET) parameters, namely Vth, Ion and Ioff, [...]

Simulation Study of Non-Quasi Static Behaviour of MOS Transistors

Kumar D.V., Thakker R.A., Patil M.B., Rao V.R., Indian Institute of Technology - Bombay, IN

In this paper, we study the "non-quasi static" (NQS) behaviour of MOS transistors using an exact quasi static Look-up Table (LUT) [1] MOSFET model implemented in a general-purpose circuit simulator SEQUEL [2], device simulator ISE-TCAD [...]

A New Analytical Model of Channel Hot Electron (CHE) and CHannel Initiated Secondary ELectron (CHISEL) Current Suitable for Compact Modeling

Larcher L., Pavan P., Università di Modena e Reggio Emilia, IT

This paper presents for the first time a new approach to hot-carrier phenomena leading to an analytical model of both Channel Hot Electron (CHE) and CHannel Initiated Secondary ELectron (CHISEL) currents. This model can be [...]