interconnects – TechConnect Briefs

Nano-contacts and Nano-interconnects

Monty G., Underwriters Laboratories, and IEC TC113, US

This oral paper is the result of nearly 3 years of review and analysis of the state-of-the art of nano-contacts and nano-interconnects. An analysis of over 80 technical articles was performed, including interviews with some [...]

Fabrication of Cu-encapsulated Carbon Nanotube Inductors

Lee B.C., Lee J-O, Lee B.C., Lee J-O, Choi Y.K., Yoon J.-B., Korea Institute of Science and Technology(KIST), KR

In this works, we developed a top-down fabrication method to pattern and form carbon nanotube(CNT) interconnects with Cu encapsulation. Using this method, we fabricated spiral Cu-encapsulated CNT inductors for RF ICs and investigated the inductance [...]

Vector Potential Equivalent Circuit for Efficient Modeling of Interconnect Inductance

Pacelli A., SUNY-Stony Brook, US

We present a compact topology for inductive parasitics, using the vector potential as a state variable. The model is local, i.e., only coupling between neighboring wires is explicitly modeled. However, the topology accounts for long-range [...]

Scalability and High Frequency Extensions of the Vector Potential Equivalent Circuit (VPEC)

Mukherjee B., Wang L., Wang P., Wang L., Wang P., Pacelli A., Stony Brook University, US

We present a complete modeling technique for inductive parasitics, based on the vector potential equivalent circuit (VPEC) topology. Novel algorithms for layout extraction and sparsification are introduced. Examples are discussed in terms of CPU time, [...]

Vector Potential Equivalent Circuit for Efficient Modeling of Interconnect Inductance

Pacelli A., SUNY-Stony Brook, US

We present a compact topology for inductive parasitics, using the vector potential as a state variable. The model is local, i.e., only coupling between neighboring wires is explicitly modeled. However, the topology accounts for long-range [...]

Automatic Generation of RF Compact Models from Device Simulation – Part I: Motivation and methodology

Luryi & A. Pacelli S., State University of New York at Stony Brook, US

We review a recently proposed methodology for automatic generation of equivalent circuits from physical device simulation. The method is based on the calibration of a simplified equivalent-circuit model on simulation results, and can achieve an [...]

Characterization of “Multipath Interconnects” for Microelectronic and Nanotechnology Circuits

Goel A.K., Eady N.R., Michigan Technological University, US

A multipath interconnect carries a signal by using the concept of parallel processing by providing two or more paths between the driver and the load. These paths are stacked vertically isolated from one another by [...]

Modeling of Electromagnetic Fields in High Speed Electronic Interconnects Using a Least Squares FD-TD Algorithm

Tramel R.W., Turowski M., Przekwas A.J., Schultz J., Frey R.G., CFD Research Corporation, US

A new Finite-Surface Time-Domain (FS-TD) numerical method is presented which is a generalization of the classical Finite-Difference Time-Domain (FD-TD) method of Yee. The method is divergence/charge preserving on arbitrary grids. It reverts to the standard [...]

Transient Electromagnetic Behaviour of Multiply Contacted Interconnects

Böhm P., Wachutka G., Münich University of Technology, DE

This paper presents a methodology for the analysis of the transient electromagnetic behavior of multiply contacted interconnects. It is shown that for applications with high switching frequencies and high pulse repetition rates with subsequent steep [...]

Capacitance Extraction from Complex 3D Interconnect Structures

Cartwright D., Csanak G., George D., Walker R., Kuprat A., Dengi A., Grobman W., Los Alamos National Laboratory, US

A new tool has been developed for calculating the capacitance matrix for complex 3D interconnect structures involving multiple layers of irregularly shaped interconnect, imbedded in different dielectric materials. This method utilizes a new 3D adaptive [...]