circuit design – TechConnect Briefs

Explicit Threshold Voltage Based Compact Model of Independent Double Gate MOSFET

Reyboz M., Poiroux T., Rozeau O., Martin P., Jomaah J., CEA, FR

This paper describes an explicit compact model of Independent Double Gate (IDG) MOSFET with undoped channel. The validity of this model is demonstrated by comparisons with Atlas simulations. The model was implemented in VerilogA in [...]

Symbolic charge-based MOSFET model

Galup-Montoro C., Schneider M.C., Federal University of Santa Catarina, BR

The new generation of compact MOSFET models provides accurate current, charge, capacitance and noise characteristics as numerical outputs of a rather complicated set of internal equations specific to each model. Clearly, numerical circuit simulation is [...]

Floating Gate Devices: Operation and Compact Modeling

Pavan P., Larcher L., Marmiroli A., Università di Modena e Reggio Emilia, IT

This paper describes a possible approach to Compact Modeling of Floating Gate devices. Floating Gate devices are the basic building blocks of Semiconductor Nonvolatile Memories (EPROM, EEPROM, Flash). Among these, Flash are the most innovative [...]

Modeling FET Variation Within a Chip as a Function of Circuit Design and Layout Choices

Watts J., Lu N., Bittner C., Grundon S., Oppold J., IBM, US

In addition to the overall range of circuit characteristics expected from process variation the circuit designer needs to know how closely different circuit element will track one another. We describe a new methodology for modeling [...]

A Gate Layout Technique for Area Reduction in Nano-Wire Circuit Design

Hashempour H., Lombardi F., LTX Corp., US

An strategy for developing integrated circuits with many individual nanodevices has yet to be formulated. This paper presents an homogeneous (array-based) approach for designing and manufacturing digital circuits using nanotubes or nanowires. By targeting contacts [...]

Floating Gate Devices: Operation and Compact Modeling

Pavan P., Larcher L., Marmiroli A., Università di Modena e Reggio Emilia, IT

This paper describes a possible approach to Compact Modeling of Floating Gate devices. Floating Gate devices are the basic building blocks of Semiconductor Nonvolatile Memories (EPROM, EEPROM, Flash). Among these, Flash are the most innovative [...]